Le Monstre Fet connection!

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millwood said:


has anyone actually built one of those beasts? I spiced the Zenquito (using BJT's as input pairs) and it has tremendous amount of zero cross distortion but othewise fine.

Any tip on how to fix it?

Yes, at least one forum member has built a Zenquito. Check
this thread: http://www.diyaudio.com/forums/showthread.php?s=&threadid=13212&highlight=zenquito

I plan to build one too, just don't ask me when. 🙂

I have Spiced it too, and I don't remember that it had any
alarming amount of distorsion, Of course the bias current
matters.
 
I found out the culprit: for whatever reason, my voltage was set to +/- 35vdc. After lowering it to 30vdc, it is outputing now sine waves, 🙂. But my positive side isn't working, in spite of the fact that the circuitry is symmetric and the negative side works just fine, 🙁.

BTW, christer, when you spiced yours, did you use BJT as input devices or JET? I used a pair of BJTS (2n5401 and 2n4401) in the input stage and then VAS.

the bias resistors for the input stage are 100ohm, and then 1K for the VAS. I only used 1 pair of perfect mosfet in my simulation.

I have a bunch of irf540/9540 so I will just try them on this circuitry.
 
millwood said:
I found out the culprit: for whatever reason, my voltage was set to +/- 35vdc. After lowering it to 30vdc, it is outputing now sine waves, 🙂. But my positive side isn't working, in spite of the fact that the circuitry is symmetric and the negative side works just fine, 🙁.

BTW, christer, when you spiced yours, did you use BJT as input devices or JET? I used a pair of BJTS (2n5401 and 2n4401) in the input stage and then VAS.

the bias resistors for the input stage are 100ohm, and then 1K for the VAS. I only used 1 pair of perfect mosfet in my simulation.

I have a bunch of irf540/9540 so I will just try them on this circuitry.


There's the problem. You can't just replace the JFETs with BJTs.
You would need a quite different biasing arrangement for BJTs.
With BJTs, you will get a class B input stage, which will definitely
show heavy crossover distorsion.

If you use the IRFs you may get problems with thermal runaway.
The design relies on the use of lateral MOSFETs in the output
stage, since these choke themselves when the temperature
rises. Also here, a different biasing arrangement for the output
stage is strongly recommended.
 
Christer said:
I have Spiced it too, and I don't remember that it had any
alarming amount of distorsion, Of course the bias current
matters.

Hi, Christer,

I couldn't get rid of the cross-over distortion unless I bias the input transistors (in my case two bjts), but then input impedence sucks.

I am not familiar with the jfets used in the original design but unless it has extremely low Vgs cut-off, I don't understand how it managed to eliminate zero cross-over distortion.

Any thoughts?
 
millwood said:


Hi, Christer,

I couldn't get rid of the cross-over distortion unless I bias the input transistors (in my case two bjts), but then input impedence sucks.

I am not familiar with the jfets used in the original design but unless it has extremely low Vgs cut-off, I don't understand how it managed to eliminate zero cross-over distortion.

Any thoughts?

Well, JFETs work in a very different way from BJTs. For an NPN
BJT, the base must be positive wrt to the emitter and vice versa
for a PNP. If you just replace the JFETs with BJTs you get the
following problem. The bases are tied together, and the emitters
are tied together (via resistors). This means that it is impossible
to have the base of the NPN more positive than its emitter and
at the same time have the base of the PNP more negative than
its emitter. Hence, only one of the BJTs can be on at a time.
This precisely the topology of a class B amplifier, and cross-over
distorsion is unavoidable.

An N-channel JFET, on the other hand should always have its
gate (base) negative wrt to the source (emitter). Like the NPN
you get more current if you raise the gate/base voltage, but
unlike the BJT, it turns on already at voltage well below the
source and should not be allowed to go positive wrt. to the
source. First consider a single N-channel JFET with the gate
tied to ground and the source tied to ground via a resistor.
Obviously, the gate will never be positive wrt. to the source,
rather it will be negative wrt. to the source as soon as some
current flows out of the source through the resistor. If we
increase the resistor, we would get a higher voltage drop
over it, but then the voltage between source and gate would be
even higher, ie. the gate would become more negative wrt.
to the source and decrease the source current, so the voltage
drop over the resistor won't be as high. In this way the JFET
will "autobias" and the current through it will depend on the
resistor (and manufacturing variations).

Now, do the same thing with a P-channel JFET, but tie the drain
(collector) to a negative supply instead. This JFET will autobias
depending on the resistor in exactly the same way as the
N-channel one did.

To wrap it up, instead of connecting to ground, tie the gates
together and instead of connecting the bias resistors to ground,
tie them together. If we assume the two JFETs to be exactly
matched and the resistors equal, there will be no difference
between this setup and biasing them individually as I first
explained. The gates will be at the same potential as the common
point of the resistors. If you raise the gate voltage, this common
point will follow exactly (unless it is loaded). In practice the JFETs
will never be exactly matched, which is why the design has
trimpots instead of fixed resistors; the two JFETs will need
slightly different voltage between gate and source for the same
current. in contrast to the BJT version, this circuit essentially
operates in class A.
 
Christer said:
An N-channel JFET, on the other hand should always have its
gate (base) negative wrt to the source (emitter).

isn't that due to the fact that the gate is insulated in a FET? so there is no current going through it and when there is no ac signal, the gate is always at ground.

But that doesn't by itself mean that the gate will always be negative wrt the source. As a matter of fact, quite a few jfets I checked do show sizable Vgs cutoff (threshold), from 0.1 - 1.5v.

and mosfet certainly have high high Vgs.

so the question is if I used a jfet of Vgs threshold, say, 1.5v. What will happen in Zenquito if a 1v signal is applied?
 
Don't mix up JFETs and MOSFETs. MOSFETs have an insulated
gate (they are actually called IGFETs for that reason in an old
textbook I have). In a JFET, on the other hand, the gate and
channel is actually a PN junction, or in other words, a diode!!
As long as the gate has a lower potential than the source this
diode is biased backwards, and very little current flows. If the
gate gets positive you suddenly have a forward-biased diode,
which you don't want. MOSFETs, on the other hand, come in
two types, and can be designed to work with either negative
gate voltages or positive gate voltages, the latter seems to
be more common.

What does puzzle me however is that there is also a common
type of buffer that uses the double JFET circuit we are discussing
but without biasing resistors, ie. the sources tied together.
Unless the JFETs are perfectly matched, one of the gates will
have to have the wrong polarity, which will also happen as soon
as we connect a load to the sources. Probably the "wrong"
voltage will not be very high, but operating the gate-channel
junction forward biased at all seems not sound engineering
to me.

Edit: You say you have seen JFETs with positive Vgs. I suppose
they are P-channel ones then, or you or someone else has got
the signs wrong.
 
Re: What does it achieve?

millwood said:


one thing I noticed in pretty much all the schematics on that page is that there is always a resistor (10K in the case of the Mosquito) that links the center of the two 68 ohm resistors to the ground.

What does it achieve?


Dr G Scott said:
This is to make sure that the same voltage drop is seen across each of the 68 ohm resistors to avoid excessive power dissipation across one. :flame: This is so you can use 1/4 resistors for each 68 ohm. If you use 1 watt 68 ohm resistors you can eliminate the 10 K for greater high frequency linearity. If you are going to leave the 10 K resistance in the circuit, use two 20 K one watts with the one end of each returned to the power supply voltages (one negative and one positive) They will look to be in parallel and like 10 K to AC signal voltages. This will improve the PSRR by 12 dB without any penalties except the very modest cost increase for the extra resistor. The 68 ohms can remain 1/4 watts for this approach as well.:treasure:


Hello,

Yes 🙂 , thank you G Scott, according to a discussion with JMP on one of the French forums the presence or not of the R 10 kohms brings only little of auditive difference.

... but the presence of the R makes it possible the amplifier to continue to function with the case or it has suddenly missed one of the food. This R makes that the tension continues of exit (offset) does not exceed a value between 3 and 4 Volts, which is not too high and still makes it possible a HP to resist. Without R, the offset will take the value of the remaining tension and good-bye HP... a chart of protection against the tensions continues is thus more than desirable, these amplifiers passing the current continues, nothing will not be able to save the HP without protection...!


@ + Jean-François 😎
 
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