The only bug I find that annoys me, is that lines in schematics disappear on certain zoom levels. Only visually, but when I want a screen dump I often have to readjust the window. Different center point etc. No big deal, but annoying!
No problems with Gerber production, all PCBs looks fine and no complaints from the manufacturer, except for my beginner mistakes the first couple of times.
Yes, I love KiCAD! But note that I am not an advanced user, no simulation, no personal libraries ....
🙂 Morten
No problems with Gerber production, all PCBs looks fine and no complaints from the manufacturer, except for my beginner mistakes the first couple of times.
Yes, I love KiCAD! But note that I am not an advanced user, no simulation, no personal libraries ....
🙂 Morten
One other bug in Kicad is that sometimes it is non compatible to older versions. For a few times i had the same problem. If you want to change something in an older schematic (KiCad 6xx) the tracks does not fit anymore if you delete them and try to arrange new. Suddenly there is an offset off 1 mm.
But KiCad is freeware and much better to use as sprint or eagle.
Thank you maker for KiCad and your work !!!
Greets
Peter
But KiCad is freeware and much better to use as sprint or eagle.
Thank you maker for KiCad and your work !!!
Greets
Peter
A lot of times the older-version issue is because we added new DRC checks for things that weren't previously checked. Users can always set the new checks to "ignore" so that the older boards still pass, but it still trips a lot of people up.
However, that doesn't sound like your issue if things are offset. If you notice it again I'd love to see the project and see if I can figure out what's causing it.....
However, that doesn't sound like your issue if things are offset. If you notice it again I'd love to see the project and see if I can figure out what's causing it.....
Yes, I forgot! And that is REALLY annoying!
I often take an older schematic as basis for a new one, only to find that I have to re-assign many or most components.
So now I will start from scratch and assign footprints to the first components of each type, and then copy-paste from there. Then it is not that much work!
🙂 morten
Jeff: The bug is not tailored to any spesific design. I happens all the time. I can produce it now, just a sec.
There are no missing lines in this schematic. DRC ok, and I am making a PCB now. Here is the one with no bug:
There are no missing lines in this schematic. DRC ok, and I am making a PCB now. Here is the one with no bug:
I don't remember any missing lines bugs on Win10, although 7.0.2 was an early step in the V7 series, which reached 7.0.11
It could also be graphics-driver-specific. You might check to see if your graphics card has the latest driver. (We do see a lot of issues with that on MSW; not so much on other platforms.
FWIW, the having to re-assign footprints when opening old schematics is a different issue. It's because the footprint names in the libraries changed (and the library names themselves). That should ease off over time as we're now much more rigid about naming conventions in the libraries.
(I use personal libraries, which also gets around the issue, but then you don't get the latest and greatest additions to the libraries. 🤷♂️ )
(I use personal libraries, which also gets around the issue, but then you don't get the latest and greatest additions to the libraries. 🤷♂️ )
Schematic Setup > Electrical Rules > Violation Severity. There's a big long list of violations there; any you don't want to see just set to "Ignore".
(Or the easiest way is to select an ERC/DRC error, right-click, and select "Ignore all 'xxx' violations".)
(Or the easiest way is to select an ERC/DRC error, right-click, and select "Ignore all 'xxx' violations".)
It seems that auto update or an update reminder just once a year would be a nice enhancement. Apparently the persons that are often busy with the latest and greatest are not so precise with PCB software updates 🙂
So easy!!! Thank you!
Now there is only one error that confuses me, see picture. May I use the same method here, or will that obscure other potential errors?
Personally I set those to ignore. The KiCad way to get around them is to add "power flags", but I think they just add noise to the schematic.
@jean-paul an update checker is already implemented (though I can't remember if it's in 8.0 or 9.0).