Dave,
I agree that the statements on the datasheet may be suspect. One would hope that they are fairly accurate, though, as the SpAct's "low jitter recovered clock" is listed as one of the two advantages of DIR1703. In fact, the SpAct system sounds a lot like an implementation of your design.
The 75ps output jitter is "typical" for SCKO (output bitclock) but no max output jitter is listed. Input (S/PDIF) jitter is listed as a max of 10ns, but there is no "typical" input jitter. The implication is that with reasonable circuit design and input jitter the output jitter will be close to nominal.
Does anyone have equipment capable of measuring this? These parts are only $5 one-off from digikey. I am planning on using DIR1703->AD1896->DAC with the master clock being driven from a stable oscillator. (I believe a complex solution to be beyond my digital design skills!) Unfortunately I have no way to measure the effects of this attempt to control jitter.
BTW, was I the only one confused by this datasheet? They start talking about PLL-clock mode, launch into a discussion of Crystal-clock mode, go back and make a statement about PLL-clock mode, then present a series of tables, some of which only apply to one of the modes but have no identifying remarks. I had to cross reference the DIR1701 datasheet and ask one of their engineers to figure out what was going on!
I agree that the statements on the datasheet may be suspect. One would hope that they are fairly accurate, though, as the SpAct's "low jitter recovered clock" is listed as one of the two advantages of DIR1703. In fact, the SpAct system sounds a lot like an implementation of your design.
The 75ps output jitter is "typical" for SCKO (output bitclock) but no max output jitter is listed. Input (S/PDIF) jitter is listed as a max of 10ns, but there is no "typical" input jitter. The implication is that with reasonable circuit design and input jitter the output jitter will be close to nominal.
Does anyone have equipment capable of measuring this? These parts are only $5 one-off from digikey. I am planning on using DIR1703->AD1896->DAC with the master clock being driven from a stable oscillator. (I believe a complex solution to be beyond my digital design skills!) Unfortunately I have no way to measure the effects of this attempt to control jitter.
BTW, was I the only one confused by this datasheet? They start talking about PLL-clock mode, launch into a discussion of Crystal-clock mode, go back and make a statement about PLL-clock mode, then present a series of tables, some of which only apply to one of the modes but have no identifying remarks. I had to cross reference the DIR1701 datasheet and ask one of their engineers to figure out what was going on!
Dave said:
1kHz/10kHz tone at -60dBFS: .00009%FS peak harmonic amplitude
THD -121dB at -60dBFS with a 7-pole LPF? Is this possible? Perhaps I should not be so incredulous considering they appear to have their own fab (and the exotic lengths their DAC goes through to control thermal variations), but even getting close to that seems inconcievable with commercially available hardware.
Having THD of -113dB with AD1853 already has me wondering how to make the most of this output when even premium opamps are pushing -112dB THD+N in real-world output circuits.
Asynchronous reclocking
Hi All!
A very simple and effective solution is asynchronous reclocking in the DAC. Please see my post below.
http://www.diyaudio.com/forums/showthread.php?s=&postid=13672#post13672)
Hi All!
A very simple and effective solution is asynchronous reclocking in the DAC. Please see my post below.
http://www.diyaudio.com/forums/showthread.php?s=&postid=13672#post13672)
Can buffer size (latency) cause jitter ?
Hi,
There has been some observation that computer-based audio equipments are sensitive to the buffer size setting. Some people set the buffer size to the smallest value because it produces the best sounds.
I wonder how buffer size (in equivalent to latency) can affect the level of DAC jitter or the level of PCM jitter in S/PDIF generation (of Firewire-2-SPDIF or USB-2-SPDIF converter).
The following article explains latency jitter which is another kind of jitter (so-called PC jitter ?).
> Low Latency Background - Buffer and Latency Jitter
> Optimising The Latency Of Your PC Audio Interface
> Latency in audio production systems
Many sound engineers never believe the effect of buffer size on audio playback, but recording. Audiophiles seem to disagree with this.
I came across another interesting article.
Detection threshold for distortions due to jitter on digital audio (pdf)
Kaoru Ashihara1;, Shogo Kiryu, Nobuo Koizumi, Akira Nishimura,
Juro Ohga, Masaki Sawaguchi and Shokichiro Yoshikawa
Acoust. Sci. & Tech. 26, 1 (2005)
But the jitter simulator is done in software instead of hardware.
Sampling jitter and IEEE1394 (pdf)
Hi,
There has been some observation that computer-based audio equipments are sensitive to the buffer size setting. Some people set the buffer size to the smallest value because it produces the best sounds.
I wonder how buffer size (in equivalent to latency) can affect the level of DAC jitter or the level of PCM jitter in S/PDIF generation (of Firewire-2-SPDIF or USB-2-SPDIF converter).
The following article explains latency jitter which is another kind of jitter (so-called PC jitter ?).
> Low Latency Background - Buffer and Latency Jitter
An externally hosted image should be here but it was not working when we last tested it.
> Optimising The Latency Of Your PC Audio Interface
> Latency in audio production systems
Many sound engineers never believe the effect of buffer size on audio playback, but recording. Audiophiles seem to disagree with this.
I came across another interesting article.
Detection threshold for distortions due to jitter on digital audio (pdf)
Kaoru Ashihara1;, Shogo Kiryu, Nobuo Koizumi, Akira Nishimura,
Juro Ohga, Masaki Sawaguchi and Shokichiro Yoshikawa
Acoust. Sci. & Tech. 26, 1 (2005)
But the jitter simulator is done in software instead of hardware.
Sampling jitter and IEEE1394 (pdf)
Last edited:
None of your links have anything to do with a guy listening to his CD's at home. Your comment that a large buffer affects SQ is not supported in any way by these links, it only affects the studio work.
Only way I see having too large a buffer on your computer is if it sits in virtual memory (hardrive) and causes glitches, but no way it causes jitter.
Only way I see having too large a buffer on your computer is if it sits in virtual memory (hardrive) and causes glitches, but no way it causes jitter.
Hi,
There has been some observation that computer-based audio equipments are sensitive to the buffer size setting. Some people set the buffer size to the smallest value because it produces the best sounds.
I wonder how buffer size (in equivalent to latency) can affect the level of DAC jitter or the level of PCM jitter in S/PDIF generation (of Firewire-2-SPDIF or USB-2-SPDIF converter).
The following article explains latency jitter which is another kind of jitter (so-called PC jitter ?).
> Low Latency Background - Buffer and Latency Jitter
> Optimising The Latency Of Your PC Audio Interface
> Latency in audio production systems
Many sound engineers never believe the effect of buffer size on audio playback, but recording. Audiophiles seem to disagree with this.
I came across another interesting article.
Detection threshold for distortions due to jitter on digital audio (pdf)
Kaoru Ashihara1;, Shogo Kiryu, Nobuo Koizumi, Akira Nishimura,
Juro Ohga, Masaki Sawaguchi and Shokichiro Yoshikawa
Acoust. Sci. & Tech. 26, 1 (2005)
But the jitter simulator is done in software instead of hardware.
Sampling jitter and IEEE1394 (pdf)
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