JFET with matched JFET current sink for linearising

I came up with this basic configuration while digging into ways of emulating triode like behaviour with depletion FETs. Maybe broaching this topic is like beating a dead horse and no one wants to hear about it at this point, but I found it a bit curious that I have never come across this method.

Bare bones scetch:
20240207_185727.jpg


Simulation in Falstad (perhaps questionable in accuracy from what i know about falstads transistor simulations):
RDT_20240208_1316386959895581009309008.png

(Left plot is the input waveform and right plot is the output.)

To give a bit of context. What I am really after is nice saturation characteristics in amplification stages that can be affected by power sag. I read (I forget where) that one major drawback of resistive NFB, as a method for achieving triode like transfer characteristics, is that triode tubes display something roughly equivalent to nonlinear internal NFB. And people usually emulate this by the use of diodes. My hypothesis is that using a matched JFET as a current drain in this configuration can open up the possibility to really dial in the NFB and make the transfer characteristics as linnear and symmetrical as you would like.

This is in itself not very different from using the well known "solid state cascode" configuration, but I primarily found that this was way easier to get biased properly in simulation. As you can see I only used one drain resistor and "cathode bypass" with nice results. (To retain more asymmetry, a resistor can be placed in parallel with the bottom JFET). Aditionally, it should work as I intend by using matched (or dual) transistors, while I have read that cascodes often require "complementary" transistors to work properly (??).

Would love to hear what you all have to say about the general idea, possible drawbacks or complications etc. Have you seen it before? Does it have a name?

My next step will be to implement it in LTSpice to hopefully verify the performance with a bit more reliability, take more "proper" meassurements, and examine how it behaves under different loads.

PS. This is my first post after years of spying on many great conversations. I'm very impressed by this community's knowleadability and generally friendly demeanour. Please be kind if I break any rules or some such, it's just lack of knowledge 😀

Cheers!
 
JFETs are active elements that approximately follow square law transfer function. This implies, produced distortion is only of second order. If two common source JFETs are fed with 180 deg out of phase signals with equal amplitude and the output is taken as difference of drain voltages (basically, balanced mode of operation) the output signal would be distortion-free. Source resistors (if any) should be bypassed.
 
It’s a fantastic configuration!

Erno Borbley wrote the reference on this type of thing, a reprint can be found here, I’m sure you will find a lot of useful information - https://pearl-hifi.com/06_Lit_Archive/14_Books_Tech_Papers/Borbely_Erno/JFETS_The_New_Frontier.pdf
Thanks! that's a great resource 😀 I have only skimmed through it before but I keep it handy.

That source follower with a JFET current sink is probably the closest I have come to seing this scheme mentioned.
 
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Am I mistaken, is there a constant current source between the input FET and ground? Snippit of post #1 attached below.

Is the full circuit an input FET, a drain resistor, and a CCS on the source?

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Would love to hear what you all have to say about the general idea, possible drawbacks or complications etc. Have you seen it before? Does it have a name?

I'm confused about the goal of this circuit. Few conflicting points come to mind:

1. Simple, highly linear gain block
2. Gain block with 'euphonic' second harmonic distortion
3. Distortion pattern mimicking triode (gradually decreasing high order harmonics)
4. Gain block with graceful overload behavior
5. Some particular response to power sagging
 
I think that I understand, as the circuit is deceptively simple, and so, a bit confusing. As chip_mk points out, the lower JFET operates sort of like a nonlinear resistor, not as a CCS. Which then causes the soft output peaking shown in the waveform photos, I suppose. Do you have a distortion-spectrum plot for non-peaking signals which you can post?
 
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The giveaway that it’s not simply a Pass B1 is that both FET gates are D.C. biased at ground, and that it’s not a source-follower.

It quickly occurs to me, that a B1 might foster experimentation with this idea by disconnecting the B1’s two-resistor bias divider’s high-side resistor, and the insertion of an appropriate drain resistor. Although, I haven’t verified that suspicion via the B1’s schematic. Yes, that would involve minor hacking of the B1’s PCB
 
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Too little Vds left on the bottom JFET to act as current source. It's not in saturation mode and acts a kind of nonlinear resistor.
Precisely :)
That is what I thought as well. What is especially new with this?
I assume that there is nothing particularly new with what I'm suggesting. But I haven't seen it mentioned and I think it might have some potential use. This is basically why I'm hoping to get some constructive feedback.

I'm confused about the goal of this circuit. Few conflicting points come to mind:

1. Simple, highly linear gain block
2. Gain block with 'euphonic' second harmonic distortion
3. Distortion pattern mimicking triode (gradually decreasing high order harmonics)
4. Gain block with graceful overload behavior
5. Some particular response to power sagging
I hear you. I might have been a bit clearer on some points. Mainly, I wouldn't claim triodes to be highly linear so I don't mean that all those points can be satisfied simultanoiusly. I think I was more promoting what I think it could be useful for in different variations/configurations.

I can't get it out of my head now so I'll just pour out some of my thoughts regarding why im excited by this and give you more dubious claims to rip at if you want😅

Like you said, chip, I see the lower transistor as an "asymmetrical NFB resistor", adding more negative feedback the higher the input gets (As long as it is working within its linear region). This could all probably be achieved with a string of soft knee diodes, but this solution should have some upsides and further possibilities as I see it.

Firstly, i find it cleaner as a build compared to diode variants (basically one dual JFET instead of one JFET and a bunch of NOS germanium diodes imported from Bulgaria 🫠).

More Importantly, a least from what I have tested with this topology so far, it seems to be very flexible and easily adjusted/modified to vary the behaviour, in some ways that would be a lot harder using diodes. As a starting point, it seems to be able to generate fairly linear amplification and symmetrical saturation if set up like the example in Falstad.
By adjusting the bias of the lower gate, one can shift the knee (where the feedback should kick in). To get a more severe effect (basically a harder knee) one could also send some of the output down to the lower transistors gate, if im not being confused?
And by adding a variable resistance in parallel with the lower transistor one can continuously vary how much total feedback you get.

So, a few potentiometers could (potentially) adjust the amount of feedback and its "knee" in a couple of ways, continously. Which I would find tremendously useful for tuning an amplifier.

However close it can come to achieving "triode like behaviour" is not really my concern. I'm rather just studying triode characteristics as a means to find out more about how my favourite amplifiers behave, and what factors are important to consider when designing such equipment. For that purpose, I think that the general transfer curve of 12ax7s (3/2 vs 2 exponents and the practical impact of grid current) should be fairly easily emulated to taste with this topology!

Thanks again for your attention with this 😀
 
Oh and regarding the "sag" characteristics, this is a tangent that does not really relate to the original posts intention. But it is sort of the reason I have gone down this rabbit hole so here i go expanding on it a bit too much. I have no data regarding triode stages response to voltage sag so I am not going to really be able to evaluate this behaviour in relation to anything. But as a circuit intended to deliver saturation I think it's relevant to point out that this is my main reason for preferring JFET style stages over opamps and clipping diodes and the likes. I know that I much prefer saggy guitar amplifiers over stiff ones, and more generally I think the "holistic" dynamic response of tube amplifiers is really the main reason they are so popular! I would even claim that the constantly shifting bias points, creating variations in harmonic content and overall output level, is really what makes tube amplifiers sound so distinct (3-dimensional and all that). Wow what bold claims 😅 lets not point out how wrong I am, we all have are own faiths.
 
Oh and regarding the "sag" characteristics, this is a tangent that does not really relate to the original posts intention. But it is sort of the reason I have gone down this rabbit hole so here i go expanding on it a bit too much. I have no data regarding triode stages response to voltage sag so I am not going to really be able to evaluate this behaviour in relation to anything. But as a circuit intended to deliver saturation I think it's relevant to point out that this is my main reason for preferring JFET style stages over opamps and clipping diodes and the likes. I know that I much prefer saggy guitar amplifiers over stiff ones, and more generally I think the "holistic" dynamic response of tube amplifiers is really the main reason they are so popular! I would even claim that the constantly shifting bias points, creating variations in harmonic content and overall output level, is really what makes tube amplifiers sound so distinct (3-dimensional and all that). Wow what bold claims 😅 lets not point out how wrong I am, we all have are own faiths.
In general, I concur, and have long suspected that the subjective character of tube circuit implementations is due to the the dynamic distortion profile produced by types.