Jfet testing oops!

Hi all,
I was testing some sot23 jfets and made an error, with the gate and drain tied together instead of gate and source. Unsurprisingly the jfet conducted enthusiastically and hit the 400ma current limit that I had set on the power supply. I then turned it off (within seconds).

My question is would this damage the parts? The supply was at 10v so the part was dissipating a lively 4W for a few seconds.

As a corollary, what is the continuous dissipation for a sot23 Bart? The intended purpose is as a complementary buffer at the front end of a F6 with somewhat lower PSU rails...


2005-11-08 11:27 am


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Yes, totally true; but he put +10V on the gate AND the drain.
So it acted as a switch.

Even if the device survived the ordeal, would you still want to put it in a circuit, not knowing if it still lives for ever ?
How much risk you want to take for the rest of the circuit for < 1USD ?

A small surface mount package will usually show a bulge on it's top surface when power rating is grossly exceeded.

A simple test with an Ohmmeter will tell the tale. From Drain to Source you should see a resistance somewhat close the the Rds(on) number from the data sheet. The Gate to Drain (or to Source) should show a diode like reading, low resistance one direction and very high with reverse polarity.


diyAudio Chief Moderator
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2002-10-08 11:31 am
Testing with a fake 7mA J74BL by treating it like an NJFET for 10V IDSS test with just 25mA PSU CC limit for a minute it did not blow up but after a little time the CV started to rise near 8V giving it about 200mW. After that its RDS permanently went from circa 20 Ohm to 618 Ohm and its IDSS down to 0.5mA. It ended up in the bin that it was going to anyway :D