I came across topologies for power supplies at
SMPS Power Supply Topologies: Comparison and Selection
How I am not sure will my circuit can be called as SMPS ?
[img=http://s4.postimage.org/82s7hyicp/testbucksmps.jpg]
In this circuit the transistor starts charging the capacitor as long as OP voltage is less than the input reference V4 Voltage.
I have been able to run it upto 2amps in LT spice
I have also been able to significantly smooth output by lowering the output capacitor and adding an high value inductor.
SMPS Power Supply Topologies: Comparison and Selection
How I am not sure will my circuit can be called as SMPS ?
[img=http://s4.postimage.org/82s7hyicp/testbucksmps.jpg]
In this circuit the transistor starts charging the capacitor as long as OP voltage is less than the input reference V4 Voltage.
I have been able to run it upto 2amps in LT spice
I have also been able to significantly smooth output by lowering the output capacitor and adding an high value inductor.
Thank you for your reply. If instead of capacitor there was a resistance then I would agree with you and call it linear.
Linear are inefficient. This is more efficient as it does not waste but store voltage in capacitor and release it. Also it has a switching component to it.
The output actually oscillates between in a narrow range but the oscillations were reduced by using a smaller cap.
I saw this
File:Low Drop Voltage Regulator.png - Wikipedia, the free encyclopedia
and it looks same as my circuit, so it must be linear regulator too
I am confused as for a 2ms timescale 100uf C1, I see this switching pattern.
images
Current going from transistor emitter
and yet for some values i see a constant drain of 2amps, and if its a constant 2 amp then i agree its a loss as voltage drops n heats up the switching transistor.
But looking at the switching pattern, is it STILL not switched power supply 😕
File:Low Drop Voltage Regulator.png - Wikipedia, the free encyclopedia
and it looks same as my circuit, so it must be linear regulator too
I am confused as for a 2ms timescale 100uf C1, I see this switching pattern.
images
Current going from transistor emitter
and yet for some values i see a constant drain of 2amps, and if its a constant 2 amp then i agree its a loss as voltage drops n heats up the switching transistor.
But looking at the switching pattern, is it STILL not switched power supply 😕
Its linear because Q1 works in linear mode.
In a pure switching supply the transistor is fully on or fully off.
In a pure switching supply the transistor is fully on or fully off.
Thank you for your patience, 1 last question
I agree with you the Q1 is operating in linear mode.you are awesome
the Vb is constant 3.7volts, Ib is also constant 2.2 mA
Still 😕 I wonder why this circuit is running at 100% efficiency.
3 ohm load
input 10 volts to 3 volts
Still 1amp flows, that's 100% efficient 😱
This images shows emitter current
free photo hosting
I agree with you the Q1 is operating in linear mode.you are awesome
the Vb is constant 3.7volts, Ib is also constant 2.2 mA
Still 😕 I wonder why this circuit is running at 100% efficiency.
3 ohm load
input 10 volts to 3 volts
Still 1amp flows, that's 100% efficient 😱
This images shows emitter current
free photo hosting
It cant be 100% efficient, there must be some losses in Q1 when it is conducting.
Even a switching regulator has some losses even though they are small.
I was wrong. Yes there is a terrible loss and its linear.
Thanks you Nigel. now i can sleep without nightmares
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