Intel Edison I2S DAC

[jarrettv]

I'm looking to create a digital audio project utilizing the intel edison.

I know this forum is popular using BBB and rPi but the edison is just as temping hardware.

It doesn't look like anyone has used I2S yet on the edison (or measured USB audio).

I'll try to keep this thread updated if I see anything related pop-up on the net.

If you know any details. Please post here.

Intel community question about I2S
diyaudio.com question

 

[jarrettv]

From Intel® Edison Module Hardware Guide

4.5 I2S interface
An I2S interface is available on pins 50, 52, 54, and 56. All of the I2S modes below have not been verified and are subject to change.

Table 6 Edison I2S available formats
Mode (Priority)
Frame rate
Bits/sample
Number of slots
Frame to-data offset
Frame polarity
Frame width
Frame rate inaccuracy
Notes

I2S master (priority 1)
192K, 96K, 48K, 16K, 8K
16, 24 2 1 0-left, 1-right
50/50 0%
Standard I2S protocol. 50% duty cycle on frame.

PCM slave - SFS (priority 1)
192K, 96K, 48K, 44.1K, 16K, 8K
16, 24 192 kHz: 2
96 kHz: 4
All else: 1 to 6 0 High

PCM slave - LFS (priority 1)
192K, 96K, 48K, 44.1K, 16K, 8K
16, 24 192 kHz: 2
96 kHz: 4
All else: 1 to 6 0 High

PCM master - SFS (priority 1)
1 192K, 96K, 48K, 16K, 8K
16, 24 192 kHz: 2
All else: 1 to 4
0 High 1 bit clockwide 0%
Rising edge frame sensitive. Design supports more frame-to-data offset options.

PCM master - LFS (priority 1)
1 192K, 96K, 48K, 16K, 8K
16, 24 192 kHz: 2
All else: 1 to 4
0 High 1-bit to n-bit clocks 0%
n is the width of one slot. Design supports width > 1 slot.

Left justified master (priority 2)
2 192K, 96K, 48K
16, 24 2 0 0-left,
1-right
50/50 0%
Design supports flipping polarity on the frame signal.

I2S slave (priority 3)
192K, 96K, 48K, 44.1K
16, 24 2 0 0-left,
1-right
50/50 0%

Left justified slave (priority 3)
192K, 96K, 48K
16, 24 2 0 0-left,
1-right
50/50 0%

Right justified
Not supported.

 

[jarrettv]

Another intel edison discussion on I2S drivers

As the I2S is using the SSP2 pins (also available on Arduino "block") I assume that Intel MID SSP driver like the one here could propably work (maybe with some modifications):

 

[mhelin]

Intel promised to publish the I2S documents, guess they haven't got time or interest for the task.

 

[jarrettv]

Intel Edison - Simple I2S Audio Setup - Malinov Family Web Presence

Intel Edison board provides I2S interface, and the recent firmware adds the I2S support. The default image provides two machine drivers: The default "dummy" driver simply outputs PCM data using I2S in DSP format, 24-bit, 48000 samples per second. The other machine driver is for the WM8958 codec, which appears to be a fairly complicated codec intended to be used in phones and tablets. The straight forward way to add support for another codec (say popular WM8731) is to write a machine driver for it. And I am currently working on it.
Meanwhile there is a simpler, but perhaps a bit more hackish way to get audio output working on Edison: by configuring the codec directly using I2C interface, and i2cset command in particular.

 

[jarrettv]

http://download.intel.com/support/edison/sb/edisonaudio_332434001.pdf

 

[jarrettv]

We scoped the I2S lines while playing an mp3 and everything looks good.

My DAC requires a master clock so I plan on using the high speed clock provided by the edison.

I'll keep you guys posted.

 

[jarrettv]

I fried the edison with 8v. Woops. Anyway, I haven't had a chance to resume the project since then. When I do I'll post another update.