I have partially dismantled my dual balanced TDA1541 DAC and have the following IanCanada boards for sale as a set.
I2S to PCM, FIFO II V6 , Dual XO clock board with 45 & 49MHz XOs, plus interconnects. All working and have been for a few years.
Together they offer two front panel switchable I2S inputs eg for USB and SPDIF inputs (via suitable interfaces), and support most of the old school DACs in single or balanced modes – see list below.
All the required interconnecting cables are supplied. Fifo inputs are via U.fl connectors or PH2mm pcb connector and the datasheets can be emailed to the buyer for the Fifo II and I2S – PCM boards. None needed for the XO clock board. ALSO INCLUDES 3, U.fl to panel mounting SME female cables.
I2S BOARD SPECS:
1. Support 16,18,20,24 bit PCM format output
2. Accept 16 to 32bit I2S input signals with SCK from 32*Fs to 64*Fs
3. Pure NOS mode with bit-perfect format converting
4. High speed design capable for 384KHz Fs with maximum MCLK up to 100MHz
5. Support PCM63,AD1865,AD1862,PCM1704,PCM1702,TDA1541/A and many other classical MULTIBIT DACs
6. Support TDA1541/A working at offset binary mode
7. Jumper selectable full-speed mode and half-speed mode
8. L,R simultaneous timing, launching D/A conversion at same latching edge to eliminate L/R phase difference
9. In order to reduce DAC noise floor, bit clock can be stopped after data shifted into DAC (default)
10. Delayed falling edge of latch enable signal (LLLR) applied to stop clock mode
11. Support dual mono DAC configuration
12. Jitter optimized synchronize logic architecture with last stage high speed low noise re-clocking flip-flops driven by original MCLK
FIFO II V6 SPECS
Two I2S inputs. LVTTL (3.3V) logic input level with 5V TTL tolerant The two inputs are by U.fl connectors.
Fs range - 44.1 KHz, 48 KHz, 88.2 KHz, 96 KHz, 176.4 KHz, 192 KHz, 352.8KHz, 384KHz - 16bit, 24bit or 32bit.
I2S input ports can be selected by a jumper or a on/off switch on front panel
Switching between two I2S sources is a glitch-free design. At the moment of switching, FIFO II output will keep streaming with no stops on any of the clock signals, such as MCLK, SCK/BCK and WS/LR, but SD/DATA will become zero to keep digital silence until new I2S signal is locked.
▪ I2S output - LVTTL (3.3V) logic output level, compatible with the Xo clock and I2s to pcm boards.
44.1 KHz, 48 KHz, 88.2 KHz, 96 KHz, 176.4 KHz, 192 KHz, 352.8KHz, 384KHz - 16bit, 24bit or 32bit.
FIFO Memory - 4Mb SRAM. Speed 10ns.
DUAL XO CLOCK BOARD
The XO clock board just plugs between the Fifo II and I2S boards and also supplies the MCK to the I2S board via a U.fl cable. (included)
Multi-frequency MCLK output capability
All three with cables etc cost over $300 a few years ago, selling for ~£130. (~$150) + insured shipping – about £20 mainland EU, £30 Australia/US/Canada but will be confirmed.
Please PM me if interested.
I2S to PCM, FIFO II V6 , Dual XO clock board with 45 & 49MHz XOs, plus interconnects. All working and have been for a few years.
Together they offer two front panel switchable I2S inputs eg for USB and SPDIF inputs (via suitable interfaces), and support most of the old school DACs in single or balanced modes – see list below.
All the required interconnecting cables are supplied. Fifo inputs are via U.fl connectors or PH2mm pcb connector and the datasheets can be emailed to the buyer for the Fifo II and I2S – PCM boards. None needed for the XO clock board. ALSO INCLUDES 3, U.fl to panel mounting SME female cables.
I2S BOARD SPECS:
1. Support 16,18,20,24 bit PCM format output
2. Accept 16 to 32bit I2S input signals with SCK from 32*Fs to 64*Fs
3. Pure NOS mode with bit-perfect format converting
4. High speed design capable for 384KHz Fs with maximum MCLK up to 100MHz
5. Support PCM63,AD1865,AD1862,PCM1704,PCM1702,TDA1541/A and many other classical MULTIBIT DACs
6. Support TDA1541/A working at offset binary mode
7. Jumper selectable full-speed mode and half-speed mode
8. L,R simultaneous timing, launching D/A conversion at same latching edge to eliminate L/R phase difference
9. In order to reduce DAC noise floor, bit clock can be stopped after data shifted into DAC (default)
10. Delayed falling edge of latch enable signal (LLLR) applied to stop clock mode
11. Support dual mono DAC configuration
12. Jitter optimized synchronize logic architecture with last stage high speed low noise re-clocking flip-flops driven by original MCLK
FIFO II V6 SPECS
Two I2S inputs. LVTTL (3.3V) logic input level with 5V TTL tolerant The two inputs are by U.fl connectors.
Fs range - 44.1 KHz, 48 KHz, 88.2 KHz, 96 KHz, 176.4 KHz, 192 KHz, 352.8KHz, 384KHz - 16bit, 24bit or 32bit.
I2S input ports can be selected by a jumper or a on/off switch on front panel
Switching between two I2S sources is a glitch-free design. At the moment of switching, FIFO II output will keep streaming with no stops on any of the clock signals, such as MCLK, SCK/BCK and WS/LR, but SD/DATA will become zero to keep digital silence until new I2S signal is locked.
▪ I2S output - LVTTL (3.3V) logic output level, compatible with the Xo clock and I2s to pcm boards.
44.1 KHz, 48 KHz, 88.2 KHz, 96 KHz, 176.4 KHz, 192 KHz, 352.8KHz, 384KHz - 16bit, 24bit or 32bit.
FIFO Memory - 4Mb SRAM. Speed 10ns.
DUAL XO CLOCK BOARD
The XO clock board just plugs between the Fifo II and I2S boards and also supplies the MCK to the I2S board via a U.fl cable. (included)
Multi-frequency MCLK output capability
- Automatic switching of the MCLK and Fs depending on the input I2S stream from 44.1KHz to 384KHz
- MCLK x Fs range: 128*Fs, 256*Fs,512*Fs,1024*Fs,2048*Fs
- I2S re-clocking input: LVTTL (3.3V) input level
- I2S re-clocking outputs: Two independent groups, natively support DAC in dual mono configuration
- Power supply: open to external low-noise power supplies or battery
- Enhanced EMI filters and bypassing/decoupling networks
- New anti-vibration grommet solution
- Reserved for three point three support
- Stacking possibility
All three with cables etc cost over $300 a few years ago, selling for ~£130. (~$150) + insured shipping – about £20 mainland EU, £30 Australia/US/Canada but will be confirmed.
Please PM me if interested.
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