I2S split into left & right?

[aparatusonitus]

Hi rfbrw,

Thank you for diagram, I really need that to figure out how to correctly connect 2xTDA1541. I presume the following according to both picture:

- connect pin #2 (BCK) from both TDAs directly to CLAB
- connect pin #1 (LE/WS) from both TDAs directly to WSAB
- connect pin #3 (DATA L) & 4 (DATA R) from 1st TDA (LEFT CH) to
74HC157 pin #4
- connect pin #3 (DATA L) & 4 (DATA R) from 2nd TDA (RIGHT CH)
to 74HC157 pin #7

Am I correct, or missing someting big time?

 

[rfbrw]

Hi rfbrw,

Thank you for diagram, I really need that to figure out how to correctly connect 2xTDA1541. I presume the following according to both picture:

- connect pin #2 (BCK) from both TDAs directly to CLAB
- connect pin #1 (LE/WS) from both TDAs directly to WSAB
- connect pin #3 (DATA L) & 4 (DATA R) from 1st TDA (LEFT CH) to
74HC157 pin #4
- connect pin #3 (DATA L) & 4 (DATA R) from 2nd TDA (RIGHT CH)
to 74HC157 pin #7

Am I correct, or missing someting big time?

You connect them the same way you would connect a CS8412 or a SAA7220.

 

[Zoran]

For the IV converter You can try hteese
pair of transistor
2N4401
2N4403
Described by M. Leach like sort of underground tr
with very low noise
when he replaced standard tr get improvment of 4 db SN ratio...
You can find PSpice models at net...

 

[rfbrw]

Hi rfbrw,

Thank you for diagram, I really need that to figure out how to correctly connect 2xTDA1541. I presume the following according to both picture:

- connect pin #2 (BCK) from both TDAs directly to CLAB
- connect pin #1 (LE/WS) from both TDAs directly to WSAB
- connect pin #3 (DATA L) & 4 (DATA R) from 1st TDA (LEFT CH) to
74HC157 pin #4
- connect pin #3 (DATA L) & 4 (DATA R) from 2nd TDA (RIGHT CH)
to 74HC157 pin #7

Am I correct, or missing someting big time?

Instead of L and R connected to the dac, you L+/L- and R+/R-.
Beyond that ,there is no difference in how it is connected.

 

[rfbrw]

Hi rfbrw,

Thank you for diagram, I really need that to figure out how to correctly connect 2xTDA1541. I presume the following according to both picture:

- connect pin #2 (BCK) from both TDAs directly to CLAB
- connect pin #1 (LE/WS) from both TDAs directly to WSAB
- connect pin #3 (DATA L) & 4 (DATA R) from 1st TDA (LEFT CH) to
74HC157 pin #4
- connect pin #3 (DATA L) & 4 (DATA R) from 2nd TDA (RIGHT CH)
to 74HC157 pin #7

Am I correct, or missing someting big time?

Instead of L and R connected to the dac, you have L+/L- and R+/R-.
Beyond that ,there is no difference in how it is connected.

CLAB (SCLK) to BCK pin 2 and DATAR/SCK pin 4 on both dacs.
WSAB (FSYNC) to LE/WS pin 1 on both dacs.
DAAB (SDATA) to DATAL/DATA pin3 on each dac i.e. L+/L- to pin3 on one dac and R+/R- to pin3 on the other.

 

[aparatusonitus]

Hi Zoran,

Thanks for the tip, but I am not after for very low noise transistors (for wery low noise I regulary use BC413/414/415/416 - a tip for you ). As I will use 2nd generation current conveyor for I/V conversion full of current mirrors, I guess extremly match Hfe and linear transistors is what I need. Am I wrong?

To rfbrw,

I am at work right now till morrning, so tomorow will digest your posts. Thanks, you are an

 

[Zoran]

Hi
does anybody have
complet schematic
of DSM bs (doughter board 7321)
?

 

[aparatusonitus]

Hi rfbrw,

Finally, I have figure out how to wire the hole shebang thanks to you. You have been very, very helpfull. I really do apreciate this, thank you!

 

[tubee]

I2S to R + L

Hello to you all

This subject is the exact the item I thought of last few weeks.

I am building a non (saa7220) OS I2S cd player and want to put 4 1541A dacs parallel, and feed every dac 1/4 fs after each other to create a different kind of oversampling (with help of four 8 bit shift registers 74HC164)

My questions:
Is it beneficial to sound quality to split I2S up to R + L to the dacs, combined with the use of four 1541 dacs parallel with 8 bit shift registers?

Or will the extra logic create more (jitter) problems?

Thanks for replies

Tubee

 

[rfbrw]

Re: I2S to R + L

Hello to you all

This subject is the exact the item I thought of last few weeks.

I am building a non (saa7220) OS I2S cd player and want to put 4 1541A dacs parallel, and feed every dac 1/4 fs after each other to create a different kind of oversampling (with help of four 8 bit shift registers 74HC164)

My questions:
Is it beneficial to sound quality to split I2S up to R + L to the dacs, combined with the use of four 1541 dacs parallel with 8 bit shift registers?

Or will the extra logic create more (jitter) problems?

Thanks for replies

Tubee

I dont quite see the logic behind splitting the data into L and R. You are using the TDA1541 which means having split the data you then have to recombine the data back into L&R, L/-L & R/-R or feed the dacs L & R simultaneously, which would require a BTC to COB conversion. It seems to me it would be best to leave the data alone.

 

[tubee]

rfbrw thanks for reply

The only advantage I can think of by splitting R and L is the possibility to create a separate power supply for each channel/1541dac.

But after your comments I wil stay by my original plan and wil not split up to R/L.

Another question:
Is it better for sound quality to make use of a inverter 74HC04 to invert the clock signal just before the four 1541 dacs? There are some articles here and there (on www) writing about that.

Tubee

 

[guido]

rfbrw thanks for reply

The only advantage I can think of by splitting R and L is the possibility to create a separate power supply for each channel/1541dac.

But after your comments I wil stay by my original plan and wil not split up to R/L.

Tubee

Edit: my comments were not applicable to your setup.

 

[tubee]

Yes thats why i keep my original plan:

CDM2 to standard circuit of cd-player -> saa7210 ->
-two 8bit shift registers 74-164 for WS to four 1541 dacs
-two 8bit shift registers 74-164 for SDATA of dacs
after dacs passive IV amplified with tube in CCS ECC85 or ECC88.

Dac 1 is on Q0, dac 2 on Q4, dac 3 on Q0 of 2nd 74-164 and dac 4 on of 2nd 74-164.
first 74-164 Q7 goes to 2nd Q

clock on all registers and dacs, i try a inverter to clock of dacs also

All PCB's and CDM placed in new dampened cabinet with better PS.

The saa7220 keeps in place only to produce clock signal for saa7210 and produce digital out signal for optional separate dac in future

This plan above has nothing to do with splitting I2S up to R-L!

Tubee

 

[guido]

Hi,

If you don't need dig out for now, get rid of the 7220. It seems to put a lot of junk on the supply lines. You can connect the xtal & stuff to the 7210 or use some other clock. Plenty available here. If you then need a dig out someday, use a crystal chip (or better full i2s).

 

[tubee]

Hello Guido

Is the 7220 that bad?
Also with a good decoupling and separate tl431 shunt power supply?
If so i will remove that garbage-producing chip and feed clock directly to the saa7210, clocksignal of Kwak-clock 7 (muchos gracias Elso )

I have to look then at datasheets and service manual for saa7210 to check clock-functions, managed the muting at search already.

Tubee

 

[aparatusonitus]

Just to be for sure, should I connect I2S splitter & 2xTDA1541 in balance mode like this?

http://img.photobucket.com/albums/v58/aparatusonitus/TDA1541ABalanceDAC.gif

 

[aparatusonitus]

Could someone take a look at schematic in my last post, my solder gun is getting cold

 

[rfbrw]

Could someone take a look at schematic in my last post, my solder gun is getting cold

Compare it with one of the schematics posted earlier in the thread.

 

[gil-garcia]

Can j use exactly the same schématic as aparatusonitus in order to do the same with TDA 1543 wich is fed byy I2S from the cd pro ?

Thanks

 

[gil-garcia]

HEF 4517 seems to be discontinued, do you know where it would be possible to find 2 pieces for this project.