I've noticed that a lot of high-end DACs seem to do "clock conditioning", which as far as I can tell is just basically re-clocking the BCLK/LRCLK to the MCLK using flip flops, often using a CPLD.
I understand how important reducing jitter on the MCLK is, but I can't really understand why re-clocking the BCLK/LRCLK makes any difference to the audio performance, especially as most decent DAC IC datasheets state something like "MCLK, BICK and LRCK should be synchronized but the phase of MCLK is not critical".
So, has anybody got measurements to show performance with/without re-clocking and what parameters improved as a result?
I understand how important reducing jitter on the MCLK is, but I can't really understand why re-clocking the BCLK/LRCLK makes any difference to the audio performance, especially as most decent DAC IC datasheets state something like "MCLK, BICK and LRCK should be synchronized but the phase of MCLK is not critical".
So, has anybody got measurements to show performance with/without re-clocking and what parameters improved as a result?
Made long time ago. Some dac chips are not equal relating to the two inputs timing datas.
I don't talk about the new delta sigma family chips but the old 80s', 90s' ones.
Today we putt skin blocks and sunglasses between the Sun and the ears.
I don't talk about the new delta sigma family chips but the old 80s', 90s' ones.
Today we putt skin blocks and sunglasses between the Sun and the ears.
Will depend on the DAC/ADC/DSP/system design.
Some devices won't give you a master clock, or they don't need MCLK to receive data. If they are using BCLK instead, then jitter on that signal could be a problem.
Something like LRCLK is quite slow though so likely not as sensitive. You can find devices like the CS4350 that sync on LRCLK.
Some devices won't give you a master clock, or they don't need MCLK to receive data. If they are using BCLK instead, then jitter on that signal could be a problem.
Something like LRCLK is quite slow though so likely not as sensitive. You can find devices like the CS4350 that sync on LRCLK.
Yes, there are some devices that don't clock off MCLK. But as far as I'm aware (please correct me if I'm wrong), most high performance DACs use MCLK as the timing reference which dictates the audio performance and all the other pins are just data/sync with quite a high degree of tolerance (in fact the timing specifications stated in the datasheets tell you this).
So isn't adding logic gates/buffers in between your super expensive low-jitter oscillator and your DAC more likely to degrade audio performance rather than improve it? Unless I'm missing something and someone has the measurements to demonstrate the opposite?
So isn't adding logic gates/buffers in between your super expensive low-jitter oscillator and your DAC more likely to degrade audio performance rather than improve it? Unless I'm missing something and someone has the measurements to demonstrate the opposite?
I think You are simply right and that's it..
My measurements on jitter on Sonny's Mirand audio dac/ dacs had shown that the cleanest results arrived from the simplest solution, clocks direct into the dac chip. Which is his configuration principally..
Though it's a requisit needed but not sufficient: also loads of care should be put into cross-contamination of the ground currents, bypasses, oscillator decoupling etc..
In old R2R dacs instead either BCLK or LRCLK must be reclocked.
Ciao, George
My measurements on jitter on Sonny's Mirand audio dac/ dacs had shown that the cleanest results arrived from the simplest solution, clocks direct into the dac chip. Which is his configuration principally..
Though it's a requisit needed but not sufficient: also loads of care should be put into cross-contamination of the ground currents, bypasses, oscillator decoupling etc..
In old R2R dacs instead either BCLK or LRCLK must be reclocked.
Ciao, George
Could certainly stay simple if a Masterclock rule both the front end and the dac and a fine designed layout. Anyway with third part front end what ever the clock, fifos, I still can hear the smalest change : caps, powersupply cables, traffos, even LiPoFe4 cells is not given the best as there is things seen as pointed out Joseph K... I assume it's a complex jobs to design such pcbs and asks years of experience... Liked for instance the advices provided by Marce member as it was is daily job than design HF boards.