How to model stability analysis of a linear regulator such as this?

[Fusion916]

In simulation, what is the proper method to model a stability analysis of the following circuit?

Meaning where do I inject the AC signal and where do I look at the loop gain/phase? Do I need to inject the AC signal into vdc and look at vb? If so, what other modifications do I need to make to my testbench to properly model the analysis?

 

[Elvee]

The most straightforward way (not 100% theoretically accurate, but more than sufficient) is to insert your AC source between FB and the NI input, and look at the ratio of VFB/VNI

 

[Fusion916]

The most straightforward way (not 100% theoretically accurate, but more than sufficient) is to insert your AC source between FB and the NI input, and look at the ratio of VFB/VNI

What inaccuracies arise from this method?

 

[jcx]

use forum search for Tain Middlebrook LoopGainProbe for some discussions

you can also force the output with a Isource - the impedance curve is related to the feedback factor - severe peaking is a warning sign

load step response gives similar info

 

[Elvee]

What inaccuracies arise from this method?

The loading of the divider by the amplifier's input is not taken into account

 

[Fusion916]

Elvee, do you mind posting a simulation schematic of your test circuit for stability analysis?

 

[Devilsdance7775]

I bet MicroCAP does it. If you install it and go to EXAMPLES folder than you find something similar ( stability over time, outside temperature, parts parameters deviations and transition events). Must be here.

 

[Elvee]

Elvee, do you mind posting a simulation schematic of your test circuit for stability analysis?

Here it is; the circuit had to be adjusted to display something usable as the original values were too crazy, but the principle remains the same whatever the exact circuit.

 

[Fusion916]

V3 is the AC source correct? And what purpose does the 1n4148 serve?

 

[Elvee]

V3 is the AC source correct?

Yes

And what purpose does the 1n4148 serve?

Displaying a nice downwards sloping curve as expected, instead of an ugly flat one (not connected with simulation issues).

 

[jcx]

-30 degrees phase margin at the 0 dB gain intercept means its an oscillator, not a regulator

base pullup R is always used in real circuits

the pass Q adds gain depending on load current to the loop so compensation is required somewhere - heavier overcompensation is required for larger load range, C on the reg output has a big impact on stability

 

[Fusion916]

Here it is; the circuit had to be adjusted to display something usable as the original values were too crazy, but the principle remains the same whatever the exact circuit.

Hmm, Elvee for some reason the circuit that you posted does not work for stability analysis. I had to put a large series L and large C to the AC source to get the analysis to work.

With that said, I'm finding this setup stable without any compensation. Why is this? I modeled my opamps to have a similar open loop frequency response as in the datasheet of the LM358. Is this because the low gain bandwidth product of the opamp?

 

[Elvee]

Hmm, Elvee for some reason the circuit that you posted does not work for stability analysis. I had to put a large series L and large C to the AC source to get the analysis to work.

Probably some restriction of the simulator you use.

With that said, I'm finding this setup stable without any compensation. Why is this?

Could be many reasons, transistor not conforming to model, parasitic inductance in the input loop, etc

 

[davidsrsb]

It simulates stable with Simetrix.
If you add uF level load capacitance, it becomes borderline unstable. This is cured by small series resistance.
This is typical behaviour of this sort of regulator, never use low ESR decoupling