How they make silicon wafers

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While working on my PhD in physics I've been able to take a few classes involving silicon processing techniques, and every single step of it blows me away.

Even the very first step of making a single crystal silicon ingot of that size/weight, purity, and lack of defects is staggering. The forces on that seed crystal are enormous due to the rotation of the ingot, and I'm amazed they don't break.
 
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Thanks for the link - I agree that it's a nicely done video.
The video talks about 200mm silicon wafers but these days most manufacturing is done with 300mm wafers and there is serious discussion starting about moving to 450mm wafers. Everything in the factories is automated and there are very few people needed to run the tools. Very futuristic.

A state of the art factory costs billions of dollars and the industry is splitting into companies that only manufacture, companies that only do chip design, and a few large companies such as Intel that can afford to do both.

---Gary
 
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The 32nm generation is Intel's most advanced production technology. According to Intel's press releases, they are manufacturing this at fabs in Oregon and New Mexico. Fab32 is one of the New Mexico fabs.

The large memory manufacturers (Samsung, Toshiba, etc.) also have state of the art fabs that are impressively large. Since a typical PC has 4GB of memory = 16 x 2Gb DRAM chips and only 1 processor, that means memory factories need to be a lot larger than microprocessor factories to keep things in balance. The largest Toshiba factories put out >150K 300mm wafers per month - an amazing figure. That's just the number for one factory and they have many of them.

---Gary
 
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One more interesting datapoint - here is the latest ranking of capital spending by semiconductor companies in 2010. It's interesting to see who is and who is not on the list. It tells you who is building fabs and how much they cost.

Only 2 European companies make the list and only 5 from North America. The rest are from Asia (Japan (4), Korea (2), Taiwan (6), and China(1) )
---Gary

Samsung $9,200
TSMC $5,700
Intel $5,000
GlobalFoundries $3,200
Hynix $2,750
Micron $1,900
Toshiba $1,900
UMC $1,800
Inotera $1,600
SanDisk $1,400

SMIC $1,000
ASE $850
Texas Inst. $800
Renesas $748
Elpida $634
ST $600
Rohm $574
Amkor $552
Infineon $550
Siliconware $533
 
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Thanks for your learned input. Those numbers are in $M? How the smaller firms obtain production? They go to the big ones with a pattern and its done OEM? Also what are the differences for making parts like we DIYers use? Small and power BJTs, JFETs, Mosfets, OP-AMPS. Those are not processors, even OP-AMPS have silly low integration compared to what's used in computers and automation. There must be other standards for wafer thickness, micron scale, clean air demands etc? Are they all done in same high integration capable fab houses even?
 
Most of the cheaper chips are the same circuits as the better ones, but from the border of the wafer. Ask your old physics prof or any photographer - the center of any photo image is sharper than the borders. You can still make good use of the lesser quality by not using the tiny leads that might be "fuzzy" and heat up too much because having higher resistance.
 
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From TO-3 transistors I have opened I remember the lands were big, easy to see. Must be much easier to etch, but is the wafer any different than those in the video? Also how do they fuse the wires to the outside leads on silicon? What technique?
 
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Those numbers are in $M? How the smaller firms obtain production? They go to the big ones with a pattern and its done OEM? Also what are the differences for making parts like we DIYers use? Small and power BJTs, JFETs, Mosfets, OP-AMPS. Those are not processors, even OP-AMPS have silly low integration compared to what's used in computers and automation. There must be other standards for wafer thickness, micron scale, clean air demands etc? Are they all done in same high integration capable fab houses even?

Salas,
Sorry for not including units for the spending. You are right, the numbers are all in $M, so the biggest (Samsung) was spending >$9B.

Regarding how small companies get things built - there are companies that only do manufacturing for other firms. They are typically called foundries. The top 4 companies doing this are 1) TSMC (Taiwan), 2) Global Foundries (former AMD manufacturing based in the US with factories in the US and Germany and Singapore), 3) UMC (Taiwan), 4) SMIC (China).
Some very big companies do business this way. For example Qualcomm, which makes chips found in a large % of cell phones in the world has no factories for chip production. It gets all its parts built by TSMC in Taiwan.

The analog circuits that we tend to use, like op amps are relatively simple and don't need state of the art manufacturing. The analog behavior of transistors also doesn't get better as one goes to smaller and smaller sizes. Something like Intel's 32nm technology works very well for digital circuits like microprocessors but the analog transistors would prefer slightly different optimization. So companies like Analog Devices work closely with TSMC and other foundries to have technology optimized for their business and they tend to build their circuits in older technologies where costs per wafer are cheaper.
Companies building discrete components like On Semi have kept their own factories since the optimization for their circuits is so different from digital. Also since they use "old" technology, it's still cost effective for them to build factories.

Most of the cheaper chips are the same circuits as the better ones, but from the border of the wafer. Ask your old physics prof or any photographer - the center of any photo image is sharper than the borders. You can still make good use of the lesser quality by not using the tiny leads that might be "fuzzy" and heat up too much because having higher resistance.
Pit - there is a small bit of truth to what you say but for the most part it is not correct. One doesn't print the images on a wafer all at the same time. Each chip is printed separately with a photolithography tool that "steps" across the wafer. So the idea that the edge of the wafer prints less sharply than the center is just wrong. Companies do sell lesser quality versions of the same chip that don't meet the toughest specs but I don't think that your comments about "tiny leads that might be 'fuzzy' " are the right reason.


From TO-3 transistors I have opened I remember the lands were big, easy to see. Must be much easier to etch, but is the wafer any different than those in the video? Also how do they fuse the wires to the outside leads on silicon? What technique?
The starting wafers are all similar quality silicon similar to what was shown in the video at the start of this thread. The diameter of the wafers might be smaller since the production volumes don't need the largest wafer sizes.

Wirebonding is often used for connecting the pads on a wafer to the pins on a package. The most advanced integrated circuits use technology called "flip chip" where the wafer has many small solder balls and is soldered onto package. This is used 100% in microprocessors and other high performance digital chips these days.



I also like this video which shows the place and pick tool which grabs chips that have been diced and places them in packages for either wirebonding or solder reflow. There some good pictures of both types.
YouTube - Wire Bonding
 
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Curiously I was shuffling through stuff and an old local sound magazine popped up from 1984. Had in its then news an American company named Trilogy that introduced an idea and a proto, not to use a then 10cm wafer for printing many the same chips, but to print a whole computer that could run more efficiently, even having redundancies on wafer to switch on if something fails, save the need for boards, packages & multiple connections. What happened to that PC on a wafer idea, who knows. Probably it was too closed an architecture to be viable or supported in the market.:scratch:
 
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I was shuffling through stuff and a . . . magazine popped up from 1984 . . . news (of) an American company named Trilogy that introduced an idea . . . to print a whole computer . . . on wafer . . .

What happened to that PC on a wafer idea, who knows. Probably it was too closed an architecture to be viable or supported in the market.:scratch:

Trilogy Systems was one of the most spectacular failures in the history of Silicon Valley. A lot of money was spent developing technology that was fundamentally flawed. Simple calculations should have shown that it was a bad idea but one famous man (Gene Amdahl) was able to convince many people to waste their money.

Trilogy Systems
 
i am an intern at NXP nijmegen at the moment, very interesting.
they still make a nice amount of wafers on there own site in nijmegen and also have a nice number of factory's in Asia.
its funny that they still make the original 4000 series and every time they move to a smaller process it requires a lot of effort to keep them as slow as the original series :)
 
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