How does a delta sigma DAC work?

[phase_accurate]

The intergrator is put between the feedback summing circuit (you may of course use a summing integrator as well) and the comparator.

For higher SNR you use multiple cascaded integrators.

Regards

Charles

 

[ojg]

This seems like a good thread to post my question in.

I have looked at the datasheets for the PCM1738 and the PCM1792, but they only show the frequency spectrum out to 100kHz. I can see the effect of noiseshaping, since the noisefloor increases after 20kHz and is then flat out to 100kHz.

I know that the spectrum repeats for each 8*fs (8*96=768kHz), but what happens between 100kHz and 768kHz? Is the noisefloor still flat or does it increase? Reason I would like to know is that it would affect the design of the post-dac filter.

 

[Johnsykes]

To get the equivalent of 16 Bit resolution we would have to operate at a whopping 65536 times the sample rate, for 44.1KHz that would be around 2.89GHz, a clockspeed quite possible for modern Pentium and similar CPU's, but clearly outside the range for an "economy" DAC.

Is it possible to make a PC work as a Dac ?

 

[MarcelvdG]

You can use a PC to convert a PCM signal into a sigma-delta modulate (or delta-sigma modulate, whatever you want to call it), but not at 2.89 Gbit/s, rather at 22.5792 Mbit/s or so. When you then low-pass filter that signal, you have it converted into an analogue form, but probably with a very poor signal to noise and distortion ratio (SINAD) and with lots of low-level tones because the PC's supplies are not designed to be used as a DAC voltage reference.

When you first process the signal with a few flip-flops and logic gates that get a clean clock and run on a clean supply, then you have a quite reasonable DAC, although the SINAD will not be as high as that of the far more complicated circuits in high-performance DAC chips. See for example The Best DAC is no DAC