Sorry, I apologize, my follower does not simulate as good as I said, it was the results for 1 V. At 10 V, disto is 0.0019%, +0.001% with a +/-40 V power supply. I have to check the results in the real circuit.
forr,
I cannot see the benefit of the circuit in post #19.
The circuit in post #20 is fine, although there`s nothing new about it whatsoever (maybe that`s why it`s so fine).
I cannot see the benefit of the circuit in post #19.
The circuit in post #20 is fine, although there`s nothing new about it whatsoever (maybe that`s why it`s so fine).
Hi Lumba Ogir,
---I cannot see the benefit of the circuit in post #19.---
It an unusual push-pull and distorsion is very low.
Current throught the whole circuit is about 12 mA.
Yesterday , I simulated a simple buffer made of a Sziklai pair loaded by a 12 mA CCS with the same load 2.8 kOhm and same voltage output 10 V
Overall distorsion is slightly higher but higher harmonics are lower.
So, the only remaining avantage of my circuit seems to remind the Taylor's scheme...
---The circuit in post #20 is fine, although there`s nothing new about it whatsoever---
I agree but would like to read someone having tested it.
Regards.
---I cannot see the benefit of the circuit in post #19.---
It an unusual push-pull and distorsion is very low.
Current throught the whole circuit is about 12 mA.
Yesterday , I simulated a simple buffer made of a Sziklai pair loaded by a 12 mA CCS with the same load 2.8 kOhm and same voltage output 10 V
Overall distorsion is slightly higher but higher harmonics are lower.
So, the only remaining avantage of my circuit seems to remind the Taylor's scheme...
---The circuit in post #20 is fine, although there`s nothing new about it whatsoever---
I agree but would like to read someone having tested it.
Regards.
forr,
you should avoid push-pull as far as possible.
you should avoid push-pull as far as possible.
It`s been built by many and tested sufficiently. You should consider JFET master devices (with higher current) and conventional cascode.
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