Help With Winding a Switching Transfomer

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Are there any numbers on your core halves? There's about a 1% chance it's inapplicable. It certainly is not iron powder, although Elliott seems to have forgotten to warn people that more than half the toroids out there are.

A toroid just for the sake of it doesn't get you anywhere.
 
I guess I can always try an toroid core if this one does not work correctly😀 I guess its all practice winding transformers.

Ha ha, a man after my own heart 😀 I love winding trafos, very meditative.

Do you have cores that you can recommend? I will probably have to buy it off ebay.

I will have a look around and get back to you. First I want to find out what frequency that SG chip is switching at to get some idea of the required inductance. I would guess though off the top of my head that a Sendust core will be a decent choice.
 
Abraxalito: This is Push-Pull DC/DC topology. Dont use Flyback calculations.

Haz: You need at least 3x more copper around your core. I suggest you make 2 absolutely identical primary windings, with 15 parallel strands of your wire. Make it 3 groups, each with 5 parallel strands. I.e. first layer 5+5wires, 2nd layer 5+5 wires, 3rd layer 5+5 wires... Then parallel connect to make it 15+15wires.

The rule is: Wind the core full of wire. Especially with this topology as the utilisation of the core is not the best because of the 2 primary windings...
 
Are there any numbers on your core halves? There's about a 1% chance it's inapplicable. It certainly is not iron powder, although Elliott seems to have forgotten to warn people that more than half the toroids out there are.

A toroid just for the sake of it doesn't get you anywhere.

The number on the core halves just give the the following values R3 & -97 I'm not sure what use that is. The values are on both cores.
 
I wouldn't sweat the low # of turns since the voltages here are very low compared to offline stuff . can check 1st by calculate min turns for operating flux density using the ETD core data and yer Volt*seconds,( where seconds is related to the switching frequency and duty cycle).

For a "real product" I would avoid this ESP schematic. search this forum for much better schematics. Use a DC block on the primary to avoid "flux walking" and use an output LC filter for a few good reasons.

app note here http://www.ti.com/lit/ml/slup126/slup126.pdf
 
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OK, I assume you want the air gap in the core because the schematic does not show input and output inductors?

Erroneous assumption.

Would not that change the topology from forward to flyback?

You tell me - I've never designed a flyback. Did a buck a while back though.

And if not, then show us how its done. Because, now you made me interested... ;-)

Why not answer my question about primary inductance? Is it relevant or not? If not, why not?
 
I will have a look around and get back to you. First I want to find out what frequency that SG chip is switching at to get some idea of the required inductance. I would guess though off the top of my head that a Sendust core will be a decent choice.

Since that article recommended a 4cm diameter core, I've attached a datasheet on cores that size. Sendust should do fine - the oscillator is set to 20uS/50kHz but the internal diagram of the SG3525 shows a flip-flop. So I'm wondering if this means the maximum on-time becomes 20uS?

Assuming that is so, the inductance of your four turns of wire doesn't look very high, even on the highest permeability Sendust (mu=125). From this DS I get you'll have 2.7uH with that number of turns (AL=168).

Going back to first principles V/L = dI/dt that means for 12V across the coil your current will ramp at 4.4A/uS. Sounds ways too low inductance to me - after 20uS you'll have 88A flowing if the rest of the circuit can stand it....😱

The remedy is more turns....
 

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In THIS circuit (in my oppinion) it is "irrelevant". More relevant is the primary losses due to the high currents involved. Adding an air gap means more turns to the primary which means more losses...

So, only solution to prevent flux walking (I now assume you want the air gap because of this?) is current mode control i.e. SG3524.

In my oppinion that is...
I might assume wrongly again though...
 
In THIS circuit (in my oppinion) it is "irrelevant".

So if the OP goes for the toroid option as I've outlined above, you're cool with the projected 88A peak primary current - with no load?

More relevant is the primary losses due to the high currents involved. Adding an air gap means more turns to the primary which means more losses...

I agree that an air gap means more turns, and that more turns tend to mean more losses. However there are core losses not just copper losses to consider. If the primary inductance is very high (like 48uH as I estimated and that's not very well controlled, it will depend on the clamping force), is that any sort of problem? If not, then I'm more than happy to forget about the air gap suggestion with the ETD. But the OP seemes more interested in the toroid route.

So, only solution to prevent flux walking (I now assume you want the air gap because of this?) is current mode control i.e. SG3524.

I didn't actually say I wanted an air gap - that's your notion. I expressed surprise that there wasn't one because I was concerned about the highish (and not well defined) inductance and the possibility of saturating the core - ferrite can't store much energy when there's no air gap. But sure I'm an idiot in this kind of converter design, I'm here to learn. So if high, undefined inductance isn't a problem and low energy storage isn't a problem because its a forward converter then no air gap also makes the winding easier - because with an air gap normally you have to keep windings away from the gap to avoid heavy eddy current losses.
 
Yes I see your point.

We just do not want to store any energy in THIS circuit.
We want to transfer it as fast from the primary to the secondary as physically possible...

But transferring it via an air gap certainly is an option - I do get your point. One could do some simple simulations with each alternative and compare which method is the most efficient - or something...

Could do some playing with the Poweresim for ex...

If one can omit the output inductor because of the air gap (for ex), then great!
Will most definitely consider that option in my next smps...
 
Cool, thanks now I'm getting the hang of this much better, and I've learned something 🙂

So then I'm left wondering why, when there's no regulation (feedback) why we need this chip to do anything much at all? Is it just a case of an oscillator driving two FETs out of phase, perhaps with a little dead-time between them? The SG chip is just operating as an oscillator here, right?
 
find a better schematic 1st
can use SG3525 or TL494 (but its NOT able to do current mode), use feedback or manual adj. duty cycle control. to fine tune > (using no feedback) assume around 80% duty cycle for nominal and 100% for light loads (with feedback) use 50% at highest input voltage ~ 14 Vdc
 
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So far we have the OP throwing out the core and bobbin he already has (half wound), throwing out the driver IC (worlds most common with totem pole output), throwing out the whole circuit, customizing the filter, and mastering switcher feedback loops. What he wants to do already has the best chance of actually working by his own hand.

The layout is the most prominent "if" here, maybe y'all can help with that.

For abraxalito:

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Switching frequency is 50kHz. Rd sets teh dead time. No gaps. No dust.
 
No, we don't know what the intended application is yet , specs please!, is it a one off science fair thingy? just build it,
calculate the performance with the new core.
Homework for the OP > calculate the worst case flux density using the most turns Nsec ( use faradays eq look at the app note )

If it was my design I would just add an LC output filter, DC blocking cap XFMR pri. ground connection, and provision for feedback or a pot for duty cycle control. maybe an added 1/2 to 1 turn on the secondary. also Ipri current shutdown for extra credit.
 
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A la
 

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