heijligers DAC's PLL/SynReclocking

[regal]

What are the opinions of the PLL/reclocking used in the Heijligers DAC ? Is this an improvement over say a typical DIR9001/CS8414 w/ no reclocking?



http://members.chello.nl/~m.heijligers/DAChtml/PLL/PLL1.htm


schematic

 

[Terry Demol]

What are the opinions of the PLL/reclocking used in the Heijligers DAC ? Is this an improvement over say a typical DIR9001/CS8414 w/ no reclocking?



http://members.chello.nl/~m.heijligers/DAChtml/PLL/PLL1.htm


schematic

Would be an improvement over any receiver chip based PLL.

Maybe you should speak to Guido about it.

T

 

[Guido Tent]

What are the opinions of the PLL/reclocking used in the Heijligers DAC ? Is this an improvement over say a typical DIR9001/CS8414 w/ no reclocking?



http://members.chello.nl/~m.heijligers/DAChtml/PLL/PLL1.htm


schematic

Yes (both in terms of measured performance as well as sound quality)

cheers

 

[analog_sa]

Nice. Is it possible to find the VCXO?

 

[Guido Tent]

Nice. Is it possible to find the VCXO?

Yes, follow the links from the DIY DAC page or directly go to

http://www.tentlabs.com/Components/DIYDAC/index.html

best