Hi Everyone! I am new to this forum, but want to get straight into the action by enquiring about asynchronous reclocking.
I am attempting to implement asynchronous reclocking circuit using several flip-flops driven by a Kwak Clock-7. I would like to construct this as a 100Mhz oscillator, but do not know what crystal to use or where to source one in the UK. Am I correct in thinking that at this frequency crystals operate in overtone mode?
Is there a simple catalogue solution? (e.g. RS, Farnell etc.)
I am attempting to implement asynchronous reclocking circuit using several flip-flops driven by a Kwak Clock-7. I would like to construct this as a 100Mhz oscillator, but do not know what crystal to use or where to source one in the UK. Am I correct in thinking that at this frequency crystals operate in overtone mode?
Is there a simple catalogue solution? (e.g. RS, Farnell etc.)
Asynchronous Reclocker
Hi Oli, Welcome to the forum.
Please use the email button below this post to mail me and I will repy with the schematic attached.😉
Hi Oli, Welcome to the forum.
Please use the email button below this post to mail me and I will repy with the schematic attached.😉
Is reclocking truthful?
Just a thought about asynchronous reclocking with flip-flops on the data bus before I try it...
I continue to be worried by some of the distortions this theoretically introduces and perhaps someone can correct me or assure that this is a sound technique.
The asynchronous relationship between the crystal clock and data bus from the 8412 recovered from the PLL leads to a consistent beat pattern. This is supposed to be innaudiable.
Occasionally, DATA, LATCH and DATACLOCK transistions will lead to metastable states, since these are not synchronous with the crystal clock . This will lead to a further (and random) jitter pattern.
A second set of flip-flops may absorb this jitter- but data may be lost if the first flip-flop latches up too long.
Is the result of reclocking a truthful sound, or simply a more pleasant sound resulting from shreaded data? Can more detail be heard, or is the sound simply nicer?
Just a thought about asynchronous reclocking with flip-flops on the data bus before I try it...
I continue to be worried by some of the distortions this theoretically introduces and perhaps someone can correct me or assure that this is a sound technique.
The asynchronous relationship between the crystal clock and data bus from the 8412 recovered from the PLL leads to a consistent beat pattern. This is supposed to be innaudiable.
Occasionally, DATA, LATCH and DATACLOCK transistions will lead to metastable states, since these are not synchronous with the crystal clock . This will lead to a further (and random) jitter pattern.
A second set of flip-flops may absorb this jitter- but data may be lost if the first flip-flop latches up too long.
Is the result of reclocking a truthful sound, or simply a more pleasant sound resulting from shreaded data? Can more detail be heard, or is the sound simply nicer?
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