FET Static Power Dissipation


Previously known as kingden
2008-08-28 4:27 am
Evanston, IL
For a FET I am using in an output stage, the Gate to Source voltage needs to be about 4 volts for proper biasing. I set the bias to something a little above 4. The FET is conducting about 1 amp of current at idle. The power supply is +/-40 volts. In class AB, there is 0 volts at the output at idle, so 40 drain to source.

Does this mean it will dissipate 40 watts at idle, or do I use the RDSon value to compute this (Power Dissppated = I^2 * RDSon)?