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We've all been there... Why do you think that's where I looked first?
We've all been there... Why do you think that's where I looked first?
@dlvo - FWIW... from my own experience... I was putting together the AJzm build guide over the past week or so and doing the startup process. Below is taken directly from the guide... LOL!
Glad it's back on track.
Glad it's back on track.
Thanks again. All things are progressing nicely. I hit a snag which I kind of expected. The channel I used for most of my startup testing has a very high DC offset (3+ vdc) when I reach .35+ vdc across the r7/r8. The other channel which I used sparingly when testing, is just fine. I have it biased near max for 3U case (1.4a) and the DC offset is practically 0. Hooked up a test speaker and that channel sounds good. Just probing and doing some comparisons, the resistance values and continuity tests are near same on both boards, which has me worried I damaged a jfet or mosfet when I had v+ and v- reversed. I do have a spare pair of mosfets, but I have to order jfets if it turn out to be one/both of them. Fortunately, there are so few components, I hope to be able to fix the issue quickly by just pulling component and testing.
Thanks again for your help!
Thanks again for your help!
