EIAJ to I2S converter and vice versa

cm

Member
2003-09-05 4:58 am
Singapore
Since I posted the scehmatics and PCB of a quick and dirty EIAJ converter, I have received may mails asking about mods, theory of operations, why it does not work etc etc. Also, I have recieved many request to do a I2S to EIAJ converter. So I thought I must just as well post both together with a brief description so that I can cut down on support overhead ;)

I attach the picture of the timing diagram of I2S side by side with EIAJ, taken from one of the Philips datasheet. The data format of both standards are the same, and the only difference is the phase of the LRCLK ( or WCK - many datasheet uses this interchangably ), and when the data is starting as with respect to the LRCLK.
 

Attachments

  • eiaj-i2s.jpg
    eiaj-i2s.jpg
    31.6 KB · Views: 5,268

cm

Member
2003-09-05 4:58 am
Singapore
So firstly, an EIAJ to I2S converter. I designed this circuit to drive a TDA1541 DAC from the EIAJ of a Sony servo controller chip ( CXD1135 ). Other common ones are CXD2500 etc etc. Depending on the way they are programed, some Philips servo controller also outputs EIAJ signals instead of I2S. Usually this is because a EIAJ input DAC such as TDA1545 or TDA1543A were used.

To converter EIAJ to I2S, we need to delay the LRCLK signal by 7 BCK cycles, and invert it. This is easily accomplished with NOT gates, and a 7 bit shift register. I have implemented this circuit as per the schematics below.

BCK needs to be inverted as the 74HCT374 is positive edge triggerred, and used to clock the shift register. LRCLK is inverted three times, to get the right phase, and to delay it by 2 more gates propagation delaty as compared to the shift register clock signals so that the data is valid during the clock edge.

I have run out of gates, and hence did not buffer the data signal. That can be easily accomplished by using another two NOT gates. But that would mean that I need another 74HCT04. I took the easy way out and did not bother. If you are driving long cables, or are driving several DACs ( parallel DAC for example ), it is good practice to buffer the data signal. This also prevents you killing your expensive servo controller or CS8412 if you scr*w up something.

The circuit had been tested on TDA1543 ( 4 in parallel ) with no problems. However, with the TDA1541, there is some background noise. This noise is reduced significantlly when 100 ohm resistors are connected in series with the signals to damp the ringing.
 

Attachments

  • eiaj_to_i2s.jpg
    eiaj_to_i2s.jpg
    37.6 KB · Views: 4,775

cm

Member
2003-09-05 4:58 am
Singapore
Finally, an I2S to EIAJ controller.

This circuit works on the same principle. Invert the LRCLK signal, and delay the DATA line by 7 cycles ( for 16 bits data ).

Again, I used a 74HCT04 for the inverters, and a 74HCT374 wired as a shift register.

Again BCK is inverted to clock the shift register. DATA is inverted twice to delay it by two gates propogation delay. LRCLK is inverted.

I have not built this circuit but had been told by someone who did that the circuit works. It should as it is really quite simple.

The usual 100 ohm damping resistors are good practice.

Have fun. Now you can easily implement most DACs to most servo controller regardless of formats.

CM
 

Attachments

  • i2s_to_eiaj.jpg
    i2s_to_eiaj.jpg
    37.6 KB · Views: 5,180
Hello

CM you are doing a great job!!

Please look at this link page 22--23 there is CXD2500+SM5843 +SM5861 as in my cd-player

http://www.ortodoxism.ro/datasheets/npc/SM5843AS1.pdf

My next job replacing SM5843+SM5861 with an EIAJ to I2S converter and a PCM1738 or PCM1794 dac chip(Both have digital filter built in) and finaly a XO2 clock (16.9...Mhz) and zapfilter2

But how do I connect

BCK?
WS?
Data to data
XO2 clock to pcm1794?

Best regards
Kim
 

cartman

Member
2005-05-15 7:07 pm
Europe
"Finally, an I2S to EIAJ controller.

This circuit works on the same principle. Invert the LRCLK signal, and delay the DATA line by 7 cycles ( for 16 bits data ).

Again, I used a 74HCT04 for the inverters, and a 74HCT374 wired as a shift register.

Again BCK is inverted to clock the shift register. DATA is inverted twice to delay it by two gates propogation delay. LRCLK is inverted.

I have not built this circuit but had been told by someone who did that the circuit works. It should as it is really quite simple.

The usual 100 ohm damping resistors are good practice.

Have fun. Now you can easily implement most DACs to most servo controller regardless of formats.

CM
"
cm has attached this image:
Click the thumbnail to see the original image.
 
TDA1545A: I2S to EIAJ ... how?

Finally, an I2S to EIAJ controller.

I have not built this circuit but had been told by someone who did that the circuit works. It should as it is really quite simple.

The usual 100 ohm damping resistors are good practice.
I built CM's ckt -- and built it correctly per CM's schematic -- and it does not work (my DAC is TDA1545A).
I didn't use 100 ohm R's; I used 47 ohm R's, but only for the three digital lines going into the DAC IC.

When a CD track starts, very distorted music/sound is audible for a fraction of a second, but this turns into "digital pink noise" immediately.

In a related thread on diyhifi, it was hinted that CM's approach may not work -- that, perhaps, another approach and the use of discrete shift register flip-flops (74HC164) are necessary.
Is this correct?
Has anyone built a working I2S-to-EIAJ converter for TDA1545A?

Thx for any info you can provide!
 
Last edited:

subcode

Member
2007-10-24 9:06 am
I heard some noise while music are play and want to use damping resitor as CM's recommendation,but I have not understand about damping resistor ,it should be serie to all BCK ,WS and SDATA or only SDATA?

A very old thread but today after building the i2s to EIAJ converter and connected my 1543A, i experienced the same problem...hissing noise along with the music most audible when playing music with silent passages ... BUT if i upsample the signal to 24/96 the noise is gone! Any ideas?