Drift of MOSFET source voltage

[namui]

Hi folks,
Let a simple amp be constructed this way :
1) Two single-ended class A MOSFET amps driven by a set of balanced input
and driving the load across the source pins of the two MOSFETs
2) Each amp is biased by an active current source connected between the
MOSFET's source pins and the negative supply voltage and the drain pins
are connected directly to the positive supply voltage.
So it's two followers driving the load in balanced fashion.
The potential problem is the drift in the source pin voltages of the two amps
which will appear across the load as drifting offset, caused by the temperature
increase. Unless the two MOSFETs are exactly the same, the Vgs variation will
be slightly different.
Is there any way besides capacitive coupling to the load or bias servo circuit
to keep the offset voltage practically low and constant (says within +/- 50mV) ?
Would source resistors help ?

Thanks,

[Edited by namui on 02-05-2001 at 02:12 AM]

 

[djk]

If the amp is to be a no global feedback design a servo or coupling cap will be required.To eliminate the active current source see this patent. http://www.delphion.com/cgi-bin/viewpat.cmd/US04229706__ This will cut power disipation in half.A FET follower may replace the BJT follower.If a discrete op-amp is used only one is required.This amp may be constructed with a single 5687 or 6H30Pi dual triode tube connected as a differential pair driving a pair of Magnetec BUZ900D.Bias and DC balance to be set up like a PP tube amp.If the pair of Magnetec outputs are on a common heatsink the Vgs is stable enough that the DC off-set will not drift.One pair of the Magnetec will deliver 100 watts in class A with this design or 200 watts in class AB.The amp described in the patent was the Sumo Model 9.