I wanted to build a little amplifier for my 250-Ohm headphones. It should be able to deliver a little more than the standard 20mA-ish output current of the typical opamp, while at the same time not becoming a scaled-down speaker amplifier that'd be able to supply 10's of amps to the load. The ability to survive the inherent shorting action of a TRS plug was mandatory though.
I opted to go with BC550/560 for the output devices, instead of the more typical TO-126 medium power devices. The same devices were used for the bias spreader (same tempco) and put into close thermal contact with the output transistors, ensuring excellent thermal compensation. Another pair was used to implement a simple overcurrent protection, limiting the maximum power dissipation for each output transistor to 500mW under worst-case conditions, allowing them to survive a shorted output indefinitely.
The input stage was pieced together out of a big pile of SMD JFETs (MMBF5457/MMBF5460). I ran them over the DCA75pro parts tester for a rough match in drain currents. Since I only made a one-off build on veroboard, each two SOT23 parts were mounted on a 2x3 pinheader for easy through-hole mounting. Due to not using any bipolar devices, the input filter could be pretty simple and low in parts count, not needing an input coupling capacitor. To avoid any DC offset at the output there's a cap in the feedback network though, which can be a high quality polypropylene part to avoid additional capacitor distortion. I went with a physically chunky 10uF part and an accordingly high-impedance feedback network (100k/22k).
So far everything seems to work satisfactorily.
The THD plot was recorded with a Scarlett 2i2 3rd-gen while delivering 100mW into a 220 Ohm resistive load.
The frequency response was recorded with a Picoscope 5444 into the same 220 Ohm resistive load. It seems to suggest that the gimmick capacitor wound around the feedback resistor works out to something like 9pF, where I've assumed merely 1pF in the simulation.
The bias plot was recorded with a Rigol-scope connected across both Emitter resistors of one channel over the time span of 10 minutes. The recorded data was imported into LTspice for a better view; while the labels read mV, they're actually mA (calculated from the measured voltage over the resistors and corrected for offset error). The first five minutes show idle warmup and a little overshoot of just a couple percent of the final value. The excursions going off-scale are where the amp was pushing some power into a short circuit at the output to generate some "heat" in the output stage. As can be seen, the bias spreader works like a charm and keeps the bias current steady when it returns to idle.
Schematic and LTspice file are attached for your viewing pleasure. The BJT transistor models are those from Bob Cordell (thank you, Bob!) and not included in this file. The JFET models were tuned to somewhat match the measurement results that I acquired with the DCA75, which seems to have done the trick. Most of the parts values are not critical and could have been dimensioned differently, but I have tried to incorporate what I had at hand already -- an actual parts bin build, then 🙂
I opted to go with BC550/560 for the output devices, instead of the more typical TO-126 medium power devices. The same devices were used for the bias spreader (same tempco) and put into close thermal contact with the output transistors, ensuring excellent thermal compensation. Another pair was used to implement a simple overcurrent protection, limiting the maximum power dissipation for each output transistor to 500mW under worst-case conditions, allowing them to survive a shorted output indefinitely.
The input stage was pieced together out of a big pile of SMD JFETs (MMBF5457/MMBF5460). I ran them over the DCA75pro parts tester for a rough match in drain currents. Since I only made a one-off build on veroboard, each two SOT23 parts were mounted on a 2x3 pinheader for easy through-hole mounting. Due to not using any bipolar devices, the input filter could be pretty simple and low in parts count, not needing an input coupling capacitor. To avoid any DC offset at the output there's a cap in the feedback network though, which can be a high quality polypropylene part to avoid additional capacitor distortion. I went with a physically chunky 10uF part and an accordingly high-impedance feedback network (100k/22k).
So far everything seems to work satisfactorily.
The THD plot was recorded with a Scarlett 2i2 3rd-gen while delivering 100mW into a 220 Ohm resistive load.
The frequency response was recorded with a Picoscope 5444 into the same 220 Ohm resistive load. It seems to suggest that the gimmick capacitor wound around the feedback resistor works out to something like 9pF, where I've assumed merely 1pF in the simulation.
The bias plot was recorded with a Rigol-scope connected across both Emitter resistors of one channel over the time span of 10 minutes. The recorded data was imported into LTspice for a better view; while the labels read mV, they're actually mA (calculated from the measured voltage over the resistors and corrected for offset error). The first five minutes show idle warmup and a little overshoot of just a couple percent of the final value. The excursions going off-scale are where the amp was pushing some power into a short circuit at the output to generate some "heat" in the output stage. As can be seen, the bias spreader works like a charm and keeps the bias current steady when it returns to idle.
Schematic and LTspice file are attached for your viewing pleasure. The BJT transistor models are those from Bob Cordell (thank you, Bob!) and not included in this file. The JFET models were tuned to somewhat match the measurement results that I acquired with the DCA75, which seems to have done the trick. Most of the parts values are not critical and could have been dimensioned differently, but I have tried to incorporate what I had at hand already -- an actual parts bin build, then 🙂
Attachments
Nice, though more trouble than I'd go to for my $13 'phones. I notice that the design is completely DC coupled. Are those big parts at the bottom by any chance coupling caps?
Yes, they are. C2 in the schematic above. They're not at the input, but in the feedback path, so the design is not DC coupled.
It is DC coupled with a DC Gain = 1 because of C2.
Any DC at the input will appear at the output.
Any DC at the input will appear at the output.