Distortion in commercial amplifiers

Maybe you have a different experience, but at the place where I used to work, on-chip inductances were neglected unless there was a good reason to believe they were relevant. For example, one would extract on-chip trace inductances and couplings (RLCK) in a circuit operating at frequencies well above 1 GHz or in a VCO or DCO design, but not by default in every relatively low-frequency block, because the netlists simply got too large to be of any use. Most of the time we got away with that, sometimes not.
 
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I spent enough years dealing with on-chip RC delays in digital logic. :)

Part of the difference between simulation and test results at 20 kHz could be because the cross over distortion is typicaly larger where reverse bias and switching time have more effect than at 1 kHz.
I am wondering if this is still true. A back-of-the-envelope calculation shows that a 5V/us slew rate allows tens of nanoseconds in switching, which is a long time for a Ft=30MHz transistor.
Ed