For the digital re-clocking gurus.
1: If I have a dac that's been measured to have itself 5ppm of jitter on it's outputs. What happens to that if I feed it 200ppm of jitter from a source, does it stay at 5ppm.
2: Then if I insert a regarded re-clocker that said to have 0ppm, and insert that between the 200ppm source and the 5ppm dac, what come out of the dac then????
Cheers George
1: If I have a dac that's been measured to have itself 5ppm of jitter on it's outputs. What happens to that if I feed it 200ppm of jitter from a source, does it stay at 5ppm.
2: Then if I insert a regarded re-clocker that said to have 0ppm, and insert that between the 200ppm source and the 5ppm dac, what come out of the dac then????
Cheers George
What do you mean by jitter on the DAC output? Jitter is in the digital domain, but the DAC output is analog. Jitter (= clock timing) causes amplitude error.
Seems the input to the d/a converter now I think about it, that way you get it all before it goes analog?
Cheers George
Cheers George
Re-clocking simply means you have a first-in-first-out queue. The data is added to the end of the queue using a clock that may not be accurate. The bits are then read off the front of the queue and converted at the more accurate clock.
As long as the queue doesn't empty (data underrun) or lose bits due to a full queue then it doesn't matter.
Next we have the old issue if 'jitter' being an all-encompassing term, inside we have deviation caused 'close-in' noise through to long drift from longer term accuracy, for example:
Audio ADC and DAC don't really care about long term (minutes, hours, .., millennia). Just the close-in short term matters for audio ADCs and DACs. So it it depends on the frequency and the phase noise.. 0ppm isn't going to happen. However a £156 oscillator would get you very good 130dB close-in noise. Now you have to ask yourself how much jitter can detected by the human ear vs the cost for ppm..
The frequency ppm figure is the deviation from the expected clock edge. Every clock has ppm, but it's not just the oscillator that counts it's the entire package.
My CDP has a 100ppm crystal from 1997. My ADC will have a 25ppm oscillator. My sig gen marketing blurb says 300ps +0.05ppm but I know the ADC clock has considerably less noise on the scope so I know which I would choose.
So TL;DR - you can have a 200ppm input into a reclocker and clock it at 25ppm or even better as long as there's a FIFO to buffer the audio stream.
I suspect there's a lot of mis-analysis, a better clock should have a better power supply and therefore that causes less noise.
As long as the queue doesn't empty (data underrun) or lose bits due to a full queue then it doesn't matter.
Next we have the old issue if 'jitter' being an all-encompassing term, inside we have deviation caused 'close-in' noise through to long drift from longer term accuracy, for example:
- resistor noise on the power supply to the clock causes deviation of the clock pulse (ie white noise) by a very small amount - adding to short term instability.
- the noise from the caps, transistors etc that also cause clock deviation (flicker noise) by a very small amount, again impacting short term stability.
Audio ADC and DAC don't really care about long term (minutes, hours, .., millennia). Just the close-in short term matters for audio ADCs and DACs. So it it depends on the frequency and the phase noise.. 0ppm isn't going to happen. However a £156 oscillator would get you very good 130dB close-in noise. Now you have to ask yourself how much jitter can detected by the human ear vs the cost for ppm..
The frequency ppm figure is the deviation from the expected clock edge. Every clock has ppm, but it's not just the oscillator that counts it's the entire package.
My CDP has a 100ppm crystal from 1997. My ADC will have a 25ppm oscillator. My sig gen marketing blurb says 300ps +0.05ppm but I know the ADC clock has considerably less noise on the scope so I know which I would choose.
So TL;DR - you can have a 200ppm input into a reclocker and clock it at 25ppm or even better as long as there's a FIFO to buffer the audio stream.
I suspect there's a lot of mis-analysis, a better clock should have a better power supply and therefore that causes less noise.
George,
After re-reading your question, I realized that I did not read it thoroughly. Sorry for that. Forget what I wrote in my previous comment.
Jitter is essentially digital phase noise. It causes deviation of the theoreticaly equal conversion intervals. If one interval is longer than it should be, the resulting analog output after conversion is higher than it should be, and vice versa. If the jitter is uncorrelated, it causes noise in the analog domain. If it is correlated with some other digital signal, it causes distortion.
Now, the DAC itself contains some digital circuitry. So yes, there can be internal jitter within the DAC chip. And if we understand the term "DAC" in broader sense, it is everything from the SPDIF/Toslink input, through the PLL clock recovery circuit, to the conversion chip. It is the clock recovery circuit that introduces the most jitter.
In general, uncorrelated jitters add just like analog uncorrelated noises (root mean square rule). To answer your question: "if I insert a regarded re-clocker that said to have 0ppm, and insert that between the 200ppm source and the 5ppm dac, what come out of the dac then?" it will be still 5 ppm.
So we have to differentiate between a complete, boxed DAC and the DAC chip within the box. I've never seen the jitter spec of any DAC chip, just a complete circuit.
One more thing: jitter as a single value is the average over the audio frequency band. Just like the RMS noise. It is more informative to represent it as a graph like picoseconds vs. frequency. Typical jitter of a quarz clock shows something like 1/f curve, that means jitter is higher at low frequency and dropping. Look at the actual jitter value at 10 Hz to get more realistic information. If it is not specified, it is suspect.
After re-reading your question, I realized that I did not read it thoroughly. Sorry for that. Forget what I wrote in my previous comment.
Jitter is essentially digital phase noise. It causes deviation of the theoreticaly equal conversion intervals. If one interval is longer than it should be, the resulting analog output after conversion is higher than it should be, and vice versa. If the jitter is uncorrelated, it causes noise in the analog domain. If it is correlated with some other digital signal, it causes distortion.
Now, the DAC itself contains some digital circuitry. So yes, there can be internal jitter within the DAC chip. And if we understand the term "DAC" in broader sense, it is everything from the SPDIF/Toslink input, through the PLL clock recovery circuit, to the conversion chip. It is the clock recovery circuit that introduces the most jitter.
In general, uncorrelated jitters add just like analog uncorrelated noises (root mean square rule). To answer your question: "if I insert a regarded re-clocker that said to have 0ppm, and insert that between the 200ppm source and the 5ppm dac, what come out of the dac then?" it will be still 5 ppm.
So we have to differentiate between a complete, boxed DAC and the DAC chip within the box. I've never seen the jitter spec of any DAC chip, just a complete circuit.
One more thing: jitter as a single value is the average over the audio frequency band. Just like the RMS noise. It is more informative to represent it as a graph like picoseconds vs. frequency. Typical jitter of a quarz clock shows something like 1/f curve, that means jitter is higher at low frequency and dropping. Look at the actual jitter value at 10 Hz to get more realistic information. If it is not specified, it is suspect.
In my view, from a lot of reading and experience noise is your main problem from power supplies, mains feeding the power supplies, internal components and the reality of impedance. A lot of good videos from 'famous engineers' have talked through the reality to the ease of getting amplitude information anywhere in packets the difficult part is turning this into a quiet analogue step wave stream and protecting this on its journey to your DAC chip. Ofcourse the 'clock' itself plays a big part with its own jitter and noise
You cant reverse noise, you can clean a little but keeping noise to a minimum is the best solution
Ive been please with my clock upgrades
You cant reverse noise, you can clean a little but keeping noise to a minimum is the best solution
Ive been please with my clock upgrades
Hey George,
I am not the right guy to explain technical parameters, but I did learn a lot from ecdesins tda1541 nos dac topic.
You can find well written explanations on how he tried to solve different kind of jitters problems around the dac.
Since it is very complex as everything from psu,quartz cristal,I2S line,IV output,spdif/usb receiver will affect the sound somehow......the tread very long....it started 2006!... But well worth it to read over.
I have fund new things,solutions even recently as I use tda1540 and 1541 dac with some of the modding I learned from ecdesigns.
To make it short I advice you to take peek into it. you can even jump into the middle as he constantly changed the approach to the problems and get from a usually complex solution to a much simpler with the same benefit.
cheers Csaba