I think this thread would be more at home in the "Class D" forum...
Anyway, Texas Instruments makes integrated class D solutions (TPA series), not sure if you could use those to drive a power MOSFET stage or something...
You could also use an Analog Devices Blackfin DSP to implement that. Go see here . Or any decent DSP actually...
There may be other solutions, see what Philips, Maxim and Cirrus make these days...
Anyway, Texas Instruments makes integrated class D solutions (TPA series), not sure if you could use those to drive a power MOSFET stage or something...
You could also use an Analog Devices Blackfin DSP to implement that. Go see here . Or any decent DSP actually...
There may be other solutions, see what Philips, Maxim and Cirrus make these days...
I think this thread would be more at home in the "Class D" forum...
I know, but that forum specifically mentions "power amplification/ power D/A".
That kind of seems to exclude low level signal processing...
Thanks.
Some background on why I'm asking:
I would like to implement a Subharmonic Synthesizer (SHS) in DSP.
In case you're wondering, an SHS creates a wave identical to a musical program wave, exactly one octave below the original.
Many people buy/make a subwoofer, to discover most program content doesn't contain much material below 50Hz. It's hard to enjoy a sub when it has nothing to reproduce.
To implement an SHS, you low-pass filter frequencies, say, below 80Hz (with a sharp knee). You then divide the frequency of this content by 2 (some implementations use a flip-flop). You sample the envelope of the original wave, and shape the divided wave to the same envelope.
You've got a copy of the original sounds, one octave below.
Then you either mix back the sub-harmonic into the main program, or you output it separately to a subwoofer.
The subharmonic blends in very naturally with the original sound, because waves exactly one octave apart do not sound dissonant.
The ear doen not perceive it as an artifact.
A binary implementation of this would be to take each sample from input in a processor, and present it to the output at half the clock frequency. When the input has completed two full cycles of a wave, the output has completed just one. The processor then discards the extra wave from the input and proceeds to cycle 3. The discard is necessary so the copy's envelope does not last longer than the original's. The processor needs to implement a buffer (queue) for storing the binary values, since the input is running faster than the output.
For this purpose, it's useful to be able to work in binary, and convert to PWM only later.
Adrian
I would like to implement a Subharmonic Synthesizer (SHS) in DSP.
In case you're wondering, an SHS creates a wave identical to a musical program wave, exactly one octave below the original.
Many people buy/make a subwoofer, to discover most program content doesn't contain much material below 50Hz. It's hard to enjoy a sub when it has nothing to reproduce.
To implement an SHS, you low-pass filter frequencies, say, below 80Hz (with a sharp knee). You then divide the frequency of this content by 2 (some implementations use a flip-flop). You sample the envelope of the original wave, and shape the divided wave to the same envelope.
You've got a copy of the original sounds, one octave below.
Then you either mix back the sub-harmonic into the main program, or you output it separately to a subwoofer.
The subharmonic blends in very naturally with the original sound, because waves exactly one octave apart do not sound dissonant.
The ear doen not perceive it as an artifact.
A binary implementation of this would be to take each sample from input in a processor, and present it to the output at half the clock frequency. When the input has completed two full cycles of a wave, the output has completed just one. The processor then discards the extra wave from the input and proceeds to cycle 3. The discard is necessary so the copy's envelope does not last longer than the original's. The processor needs to implement a buffer (queue) for storing the binary values, since the input is running faster than the output.
For this purpose, it's useful to be able to work in binary, and convert to PWM only later.
Adrian
As I suggested first, if you're going to use a DSP anyway, you can generate the PWM directly from the DSP (provided that you have enough power)!
The PDF file from AD I posted, literature on Class D in the Class D forum and on the web should get you started...
Other than that, the chip from TI I talked about seems to be doing just what you asked for. The THD figures are not overly impressive, but I doubt you can do better than that directly on the DSP or via another integrated solution...
The PDF file from AD I posted, literature on Class D in the Class D forum and on the web should get you started...
Other than that, the chip from TI I talked about seems to be doing just what you asked for. The THD figures are not overly impressive, but I doubt you can do better than that directly on the DSP or via another integrated solution...
funberry,
Take a look at this site and see if the chips are what you are looking for. They take in serial and output pwm.
http://www.advanic.com.tw/Full.htm
Take a look at this site and see if the chips are what you are looking for. They take in serial and output pwm.
http://www.advanic.com.tw/Full.htm
Thanks
The Wolfson micro parts are awesome.
I will get one and experiment with it.
I am not a seasoned DSP programmer, and to implement this I would have to stick to the only one I have expecience with-- dsPIC from Microchip.
In worst case, I could indeed implement the PCM-to-PWM conversion in firmware. But I assumed a dedicated chip could do it better, faster, more accurately.
Think about it: if you have a 16 bit signal to convert to PWM-- that's 64,000 individual timing quanta. Superimpose that on a PWM base frequency of 50 KHz, and you'd need a 3200 MHz clock to resolve 16 bits in PWM.
I can't implement that in a DSP, unless I reduce something.
Reduce bandwidth: (for subwoofer) 100Hz passband, with 1KHz PWM carrier.
Reduce resolution, 12 bit instead of 16.
That's 4096 x 1000, or about 4MHz PWM timing clock. Although doable, this stretches the limit of a DSP, since you will need to execute more than 1 instruction per PWM step.
But then you have a PWM carrier in the audible range. A subwoofer channel will imply hefty class D amplification post-processing.
A class D amp operating at 1KHz! -- great; the MOSFETS will like it.
Unless the whole circuit is dunked in epoxy and cemented, there may be some audible whine coming out of that.
I'll try both approaches
thanks
The Wolfson micro parts are awesome.
I will get one and experiment with it.
I am not a seasoned DSP programmer, and to implement this I would have to stick to the only one I have expecience with-- dsPIC from Microchip.
In worst case, I could indeed implement the PCM-to-PWM conversion in firmware. But I assumed a dedicated chip could do it better, faster, more accurately.
Think about it: if you have a 16 bit signal to convert to PWM-- that's 64,000 individual timing quanta. Superimpose that on a PWM base frequency of 50 KHz, and you'd need a 3200 MHz clock to resolve 16 bits in PWM.
I can't implement that in a DSP, unless I reduce something.
Reduce bandwidth: (for subwoofer) 100Hz passband, with 1KHz PWM carrier.
Reduce resolution, 12 bit instead of 16.
That's 4096 x 1000, or about 4MHz PWM timing clock. Although doable, this stretches the limit of a DSP, since you will need to execute more than 1 instruction per PWM step.
But then you have a PWM carrier in the audible range. A subwoofer channel will imply hefty class D amplification post-processing.
A class D amp operating at 1KHz! -- great; the MOSFETS will like it.
Unless the whole circuit is dunked in epoxy and cemented, there may be some audible whine coming out of that.
I'll try both approaches
thanks
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