Deriving WS from a 24.576MHz clock?

[Lovan]

How would I go about to get a WS(192kHz) when I have a referenceclock of 24.576MHz?

/Lovan

 

[gmarsh]

Divide by 128.

A 74HC393 should do just fine.

 

[Lovan]

Hello again gmarsh!

I might be tired right now but if I divide by 128 I get Fs(192KHz) in other words, bck right?
But how do I get WS(LRCLk,whatever)?

/Lovan

 

[Lovan]

Ignore my last post.

Ofcourse, I meant BCK, not WS.
BCK should be Fs*2*24=9.216MHz right?
that is 24.576*(3/8)?

 

[Wes Marquenie]

Why to multiply by 24? I2S only supports 16 or 32 bit data frames

 

[gmarsh]

BCK will be 24.576 / 2.

The same HC393 chip used for LRCLK will generate BCK for you.

 

[Lovan]

Thank you Gmarsh.
I figured it out after I had posted the last reply. Thanks for the reassurance that I have gotten my head screwed on again 😀