DC offset problem outlaw 7125

[Yannick99]

Yes, max. resistance so output stage bias will be [3k/(1k+.22k)]x0.6V +1=3V5 app. total - voltage over Q14 Vbe multiplier transistor. Check again the values for R40, R8 and R28 ... with these values min. output stage bias would be too high from the start !!!

I double checked. I see 1k .22k and 3k. I attach a picture.
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[3k/(1k+.22k)]x0.6V +1= 2.475v (dont know is this better)

Anyway i will not change those parts.

Thank you i'll let you know

 

[patrick101]

I double checked. I see 1k .22k and 3k.

[3k/(1k+.22k)]x0.6V +1= 2.475v (dont know is this better)

Anyway i will not change those parts.

I'm afriad the Vbe calculation is not correct, it should be like this :

minimum Vbe(bias voltage) = [3k/(1k+0.22K)+1]x0.6v = 2.075v
maximum Vbe(bias voltage) = [3k/1k+1]x0.6v = 2.4v

 

[aparatusonitus]

That's right patrick101, thanks for the correction ... that's how it turns out when you deal with formulas and math tired and sleepy and without using all the fingers😀

 

[patrick101]

That's right patrick101, thanks for the correction ... that's how it turns out when you deal with formulas and math tired and sleepy and without using all the fingers😀

Yes, me too. We can do the correct calculation, but sometimes when type it in formula, we might type it wrong.