DAC clock issue

[macgyver]

I'm building a prototype for my AK4395 based dac. The receiver is AK4114. The dac should be able to work 32kHz-192kHz. In protype I'll use AK4114's auto clock setting mode (ACKS) to feed the AK4395. The clock is generated from recovered spdif signal.

Some info:
http://www.akm.com/AppsNotes/ACKS Mode.pdf

This kind of setting wouldn't be ideal for low jitter (especially if the spdif source produces high jitter).

So if I go for external clocks, is the best way to use two different clocks, one for 44.1kHz and another for 48kHz etc.?

One cheap way to do two different clocks would be PLL170X chip. Is there any other ways to handle this?

I also find this to reduce the jitter:
http://www.akm.com/AppsNotes/Reclocker.htm

 

[macgyver]

Up.

 

[Johnix]

You should use an upsampling chip (such as SRC4192) with 1:1 clock ratio and clean crystal XO clock source on the output of the chip and your DACs.

Fifos are an elegant way to cancel jitter 🙂

 

[fixerfrasse]

You should use an upsampling chip (such as SRC4192) with 1:1 clock ratio and clean crystal XO clock source on the output of the chip and your DACs.

Fifos are an elegant way to cancel jitter 🙂

Is there any diy fifo solutions available? What problems comes with buffers and are there any other issues to take care of?

 

[macgyver]

You should use an upsampling chip (such as SRC4192) with 1:1 clock ratio and clean crystal XO clock source on the output of the chip and your DACs.

Fifos are an elegant way to cancel jitter 🙂

Some people I know, don't support these asynchronous sample rate converters. But maybe I'll test it.