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DAC chips with more current!

Paralleling DACs to get more current works fine until we get bored with soldering so many chips down to the PCB. I've also been wondering if more juice can be had without tying up so much PCB real-estate. So I've been looking for DACs which deliver more current, and in particular, more output current in relation to supply current. In Celibidache I'm using 20 TDA1387s and the supply current is 110mA @5V to deliver 20mA output swing, per channel. Hence 5.5mA per 1mA output current but in its favour there are two independent channels.

Communications DACs are quite a long way from the world of audio DACs but I've long suspected they might turn out to work fine reproducing audio. Their THD specs tend to be poorer without a doubt as they don't use DEM methods to improve DNL/INL. (There are one or two recent designs that incorporate self-calibration though.) Recent designs tend to be more expensive and in much trickier to use (higher pin-density) packages so I tend to favour older models in SOP28 and the like. Things that appeal to me about comms DACs are - they're stripped down to bare essentials converters, no fancy features like digital filters or sample rate converters on-chip. They are cheap when bought recycled (under $1 a piece typically) and they go up to insanely high sample rates. This latter aspect gives me confidence that we can run them heavily oversampled if need be without loss of significant performance as even 32X OS is off to the far-left of the spec graphs of these devices. Their extreme speed capability means they're always parallel-input this is a minor inconvenience in terms of an extra logic overhead.

I have a short tube of AD9764 in my possession - this chip delivers 20mA balanced output swing for a supply current of under 30mA, depending on sample rate. Better than 1.5mA of supply per 1mA output current. Here are its lack-lustre characteristics - bear in mind this is a 14bit part :


image_2022-06-02_202752216.png


and here's its block diagram :

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Its a multiplying DAC so its reference input can be varied (over a 10:1 range) to create a rudimentary volume control for the first 20dB.

The output noise spec is 50pA/rtHz which translates to 2.5nV/rtHz in a 50R resistor, giving a dynamic range of 120dB, assuming no intrusive 1/f noise. This is rather a lot better than even TDA1541 (110dB) and it has a high Zout (100k) and a wide compliance range of over 1V. So relatively tolerant of I/V stages. We just need to find ways to improve the resolution from 14bits and perhaps to smooth out the INL/DNL somehow.
 
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The only other DIYer I'm aware of using comms DAC chips for audio purposes is xx3stksm : https://www.diyaudio.com/community/threads/two-way-dac-multibit-and-dsm-from-scratch-with-input-options-sdmicro-toslink-and-iis.331079
In this post he compares the noise performance of various examples and notes that great RF noise numbers do not necessarily translate to audio band performance : https://www.diyaudio.com/community/...thd-etc-in-multi-bit-dacs.321189/post-5400877. Also setting output current to the max doesn't necessarily yield the best results - he uses 6mA from a 20mA max chip.

He's particularly interested in ultra-low THD for instrumentation purposes. I'm not so interested in chasing that as I'm not convinced its audible but I am open to persuasion. The DAC chip he's settled on is AD9717, this is a modern one (tricky package) that has internal calibration to improve its INL/DNL specs.

Here's the relevant line in the spec table, AD9717 is the highest resolution member of a family of devices :

image_2022-06-03_205630823.png


Look at how good the DNL gets relative to the number of bits - at 8 bits, each bit width is within 0.3% of the others, very impressive. Going to 10bits, each LSB is a quarter the width so if the precision were relatively the same we'd expect 1.2% and to one decimal that's what we do get. However look at what happens when we add two further bits, to 12. I'd expect 4.8% but in fact we have 20%. So even though there are 4 times as many bits, they're even less precisely weighted than for the 10bit DAC. Things get worse still at 14bits. From the point of view of how precisely the bits are weighted, we seem to have a sweet-spot at 10bits, beyond which measured performance goes to pot.

As regards noise, the output noise isn't specified in the same way as with the older DACs so I'll need to do some number crunching to see if I can come up with an apples-apples comparison. The ADI price of AD9717 is ~$14 (it is a dual channel DAC though) and I've not found any recycled ones on Taobao so I'll keep searching for a cheaper and easier to solder alternative to this chip.
 
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Its interesting to compare an earlier generation of chips, since these parts are subject to continuous refinement. AD9717 dates back to 2008, its predecessor AD9707 is from two years earlier. Here's how the older parts stack up on INL/DNL (I'm guessing by arranging them in opposite resolution order and swapping the order of DNL/INL they're discouraging direct comparisons) :

image_2022-06-04_192234804.png


Interesting that the performance of the older 14bit part is superior both prior to and after calibration. And not by a small amount either - the AD9707 is very comfortably monotonic after calibration but AD9717 is marginal. Perhaps there are different contexts to explain this, I'll delve into the small print to explore further. The first thing to notice is the fullscale current is 2mA for both tables, but the older parts go up to 5mA and the newer, 4mA.
 
On the older chips still specified for output noise the simple way, there's a pA/rtHz spec and almost without variation that number is 50pA @ 20mA, declining to 30pA @ 2mA. I've been studying DAC datasheets for quite some years now and have collected a few - so it stuck out like a sore thumb when I found this spec :

THS5661A_20220609112001.png


This comes from TI's THS5661A 12bit DAC DS but their other offerings in the same family give the same figures so it can't be a typo. I have some of these devices so this really needs an investigation, given ostensibly these DACs deliver 10dB better SNR on paper. Of course it could be that HF noise has been reduced at the expense of LF, only experiments will reveal the underlying truth.

Incidentally I've just noticed 'moar' got changed to 'more' in the title of this thread. Stealth autocorrect or some human intervention?
 
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THS5661A_20220619141521.jpg


Here's my test-bed for THS5661A taking shape. The 8 chips top right are HC595s doing serial/parallel conversion. I am veering towards putting the cascode MOSFETs on a plug-in board as in the past when I've experimented with paralleled chips, the common-gate MOSFETs have a tendency to oscillate and hence self-destruct. There's really too much current for it all to be channeled through a single MOSFET unless its heatsunk so I greatly prefer paralleled smaller FETs to share the load but the oscillation issue is a serious one.
 
There is (or seemingly, was) another DIYer using parallel input DACs but his visible progress halted over 3 years ago : https://www.diyaudio.com/community/threads/ad768-as-audio-dac.372862/. He was using AD768 as its jolly cheap on Aliexpress, recycled.

AD768 is rather interesting as far as high current parallel DAC chips go as its especially old and even so still sold on Mouser ($84 a pop!). Its also unique in that its a 16bit part whereas all the more recent parts top out at 14bits. Nowadays CommsDACs are built on pure CMOS processes but back in the day (mid 1990s) they were using a mixture of bipolar and CMOS. What makes that interesting to me is that bipolar process DACs typically have flatter noise floors vs frequency (compare noise FFTs of TDA1541 against TDA1545) and I'm interested in getting as low LF noise as I possibly can. The price of this is of course higher current consumption, the AD768 is about 3X as thirsty as the other chips I've been considering, added to that it needs dual rails. So how does AD768 stack up otherwise?

One of the first things to note is it does actually have a guaranteed monotonicity of 13bits, over temperature. Other CommsDACs tend to be extremely coy about monotonicity. DAC904 makes no mention of it, nor does AD9764. What of DACs intended for audio? PCM56 says '15bit monotonicity, typ'. So not guaranteed and we can only presume it applies at 25oC. PCM63 says that Colinear architecture ensures monotonicity and demonstrates with a scope plot. AD1865 doesn't mention it, AD1862 likewise is silent. From what I can figure, if the DNL doesn't exceed -1 in magnitude then a DAC is monotonic. So perhaps DNL is a better metric for comparison. Audio DAC manufacturers almost never cite DNL (I say almost because I do have a vague memory of it being mentioned on TDA1541A) so DNL comparisons will be limited to CommsDACs.

On DNL, AD768 is -6 worst case at 25oC. Whereas AD9764 is -2.5 at the same temp. In order to directly compare we need to bear in mind that AD768's LSB is 1/4 that of AD9764 as the latter is only 14bits. So apples-to-apples this is -6 vs -10. INL is -8 vs -18. Both are a clear win for AD768. Where AD768 falls down is on glitch impulse (35 vs 5pV-s) and dynamic numbers such as SFDR and THD. On the question of noise, AD768 specifies noise at maximum output current (all 1s*) whereas the others don't specify the conditions. Based on all of this I figure AD768 has to be worth a listen. There is another bipolar process parallel input DAC of interest but its much more expensive than AD768, that's the HI5741. From its DS it does look to be genuinely monotonic at 14bits. If AD768 turns out not to sound good I'll give HI5741 a spin.

* I later realized this is a mistake. The noise is specified on the IoutB terminal (not the laser-trimmed IoutA) which has minimum current at all 1s. Very sneaky of ADI to do this!
 
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AD768-2nd-proto.jpg


AD768 in its first prototype form has been playing music for a couple of weeks and I like it a lot, it draws me into the music which is what I love. So much so that I've now built a second one. This allows me to listen to one while trying out ideas on the other one. I also wanted to verify that the good SQ of the first one wasn't just a fluke.

Here's the stock implementation :

image_2024-10-15_214814069.png


On the first proto, I used the on-chip 2.5V reference. But then I thought - as its only a bandgap, why not use an external TL431? With a 5V reference, I can filter the output with a 'lytic. Which is what I've done on the 2nd prototype. The other advantage is it allows the chip to run just a tad cooler as the internal reference is disabled. Its already quite toasty so even a small reduction is welcome. Rref (500ohm in the pic) is allowed to go up to 1kohm, I'm wondering if a higher value gives lower noise. Of course with 1kohm the reference has to be 5V or the output current will be halved.

Rather than run on +/- supplies I decided to power it on a single 12V and arranged a +5V regulator for the LADCOM (0V) pin. Current always flows into this pin. This means the logic '0' is actually +5V and logic '1' is +8.3V or so. Rather than use level shifters on all the parallel data lines to the DAC, I decided to raise the MCU 5V off the ground and use level shifters for the input I2S. With the DACs 'GND' raised 5V above the system 0V there's voltage headroom for more output swing using a common-gate P-chan MOSFET on the Iouts. The stock configuration only gives 1V p-p swing on each output, whereas I have 2V (90ohm Riv) and could increase that a bit further. Total current consumption is 230mA at 12V, including the MCU.

Incidentally, AD768s are just over $1 a pop if you buy 10 from this Ali seller : https://www.aliexpress.com/item/1005005277415665.html
 
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