Turn on and turn off conditions
Out of curiosity (and for the VFET's long life), I have done simulations during turning on and off. There is disturbing Vout negative DC, I think it is because Vgs of the MOSFETs models in the capacitance multiplier are not equal and one turns on faster than the other during the slowly rising capacitor voltages.
The VFETs bias voltages appear in a fraction of a second providing secure rising of the bias currents.
I think it would be OK.
But maybe it's a good idea to match the P and N MOSFETs to keep speaker coil healthy.
Out of curiosity (and for the VFET's long life), I have done simulations during turning on and off. There is disturbing Vout negative DC, I think it is because Vgs of the MOSFETs models in the capacitance multiplier are not equal and one turns on faster than the other during the slowly rising capacitor voltages.
The VFETs bias voltages appear in a fraction of a second providing secure rising of the bias currents.
I think it would be OK.
But maybe it's a good idea to match the P and N MOSFETs to keep speaker coil healthy.
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