CS8412 or AD1892?

[machinow]

CS8415 vs DIR1703

machinow

Why so, have they told?
Where can I look this discussion?

Regards
halyavshick [/B][/QUOTE]

Hi, halyavshick,
Actually, there were almost no discussion. That thread was here around, begun by me 😉 The answer was from fmak and some other guy I do not remember. My question was about a new design - I have the new sigma-deltas from AD /1955/ and wanted to try a new design. Unfortunately, it is obvious that SPDIF will not work fine. Also , I have AD1895 /not 1896/ to experiment with. It has lower specs than 1896. At the moment, I do not understand what is this synchro format for 1896? If this do not bother you, would you explan this to me a little bit more further?? 1896 is ASRC, how can it be used in Synchro?? Maybe Fs in = Fs out /with differencies in ppm/ or both are Synchroneous, as in the case of feeding back the CD transport w. MCLK??
Regards,
machinow

 

[Õàëÿâùèê]

Hi!

1896 is ASRC, how can it be used in Synchro?? Maybe Fs in = Fs out /with differencies in ppm/ or both are Synchroneous, as in the case of feeding back the CD transport w. MCLK??

Yes, there should be common masterclock between CD and DAC (feedback MCLK from DAC).

MCLK= 768*Fs=33,8688Mhz (with external XO only)
Fs out=4*Fs in. It is set by submission on outputs AD1896 of signals BCLK and LRCK of the appropriate frequency (4*BCKLin, 4*LRCKin for 4x oversampling) from dividers MCLK. (For 44.1/48 only)
There is necessary to submit on output AD1896
LRCK=176,4 kHz
BCLK=11,2896MHz
Jitter it does not suppress in this mode, but at us will be common masterclock, which will solve a problem. Jitter will depend from XO only (and also by design PCB).
ASRC in a synchronous mode with the whole number (we have 4x here) is the usual digital filter interpolator. The slave mode output there is an advantage.

That AD1955 would work in external DF mode, it requires the microcontroller and shift register, for change I2S in a parallel mode.
Also, it is meaningful to try a method of Guido Tent there.

Regards

 

[till]

Anybody who could post a working schematic with AD1892? The FS*512 clock is needed for function or only for resampling? what happens with some other clock at MCLK like an old 30Mhz crystal oscilator found on an old VGA?

 

[Elso Kwak]

Anybody who could post a working schematic with AD1892? The FS*512 clock is needed for function or only for resampling? what happens with some other clock at MCLK like an old 30Mhz crystal oscilator found on an old VGA?

Hi Till,
The clock needed is 512 x Fs where Fs is the new sampling frequency. So a 22.5792 MHz clock gives eactly a 44.1 kHz sampling frequency (no upsampling) and a 45.1584 MHz clock will give 88.2 kHz sampling frequency. 1: 2 upsampling. The clock is needed or it won't work.
You don't need the CS8412 as the AD1892 has already a SPDIF receiver built in!
See also the paper about the AD1892 evaluation board on the AD website. It can be found with some effort.😎

 

[till]

thanks elso,

unfortunately i don´t stock the right values

i have 53,125 ; 36 ; 28,322 and 25,175 MHz, i hope it will work with one of those. At least for proof of concept

 

[till]

When the AD1892
is used without a supporting microcontroller or microprocessor,
it will default to the I 2 S-justified mode after reset.

hmm. i thought it must be possible to connect a TDA1543 this way, but i get only digital noise with spdif connected to the 1892. with spdif not connected i get some sampling rate square wave.

 

[Elso Kwak]

Working Schematic

hmm. i thought it must be possible to connect a TDA1543 this way, but i get only digital noise with spdif connected to the 1892. with spdif not connected i get some sampling rate square wave.

Hi Till,
In this schematic it seems to work.
http://www.audioworkshop.com.hk/download/1892_1543.PDF
Forget the reclocking with the flip-flops.
😎

 

[till]

thanks Elso! it works, - with some modifications. There is only digital noise when power up, but musik comes when pin 1 is disconnected and connected to high again. So i made a 1uf from pin 1 to GND and 220k pin1 to +5V and now musik comes afetr a second or so. The musik was very distorted with the simple resistor to GND at DACs output, but is much better with one resistor to GND and another same value to +5V so the DAC works into 2,5V.

 

[Elso Kwak]

Reset Problem?

thanks Elso! it works, - with some modifications. There is only digital noise when power up, but musik comes when pin 1 is disconnected and connected to high again. So i made a 1uf from pin 1 to GND and 220k pin1 to +5V and now musik comes afetr a second or so. The musik was very distorted with the simple resistor to GND at DACs output, but is much better with one resistor to GND and another same value to +5V so the DAC works into 2,5V.

Hi Till, So basically it is a reset problem as pin # 1 is the reset pin of the AD1892.
I assume you are using passive I to V conversion after the DAC but I never got it working right...
😕

 

[Õàëÿâùèê]

Hi
Elso Kwak

and a 45.1584 MHz clock will give 88.2 kHz sampling frequency. 1: 2 upsampling

AD1892 will work only up to 48KHz.

So a 22.5792 MHz clock gives eactly a 44.1 kHz sampling frequency (no upsampling)

1892 has digital filter and even at absence upsampling, data on an output do not correspond to the data on an input.
In "bypass mode" (digital filter off) it requires external PLL and adding a microcontroller for switching for this mode.

till
Read this thread from a beginning. AD1892 is a artefact for audio😉 .
1892 and good sound are not compatible!

 

[Elso Kwak]

Confused?

Hi
Elso Kwak

AD1892 will work only up to 48KHz.

1892 has digital filter and even at absence upsampling, data on an output do not correspond to the data on an input.
In "bypass mode" (digital filter off) it requires external PLL and adding a microcontroller for switching for this mode.

till
Read this thread from a beginning. AD1892 is a artefact for audio😉 .
1892 and good sound are not compatible!

Hi,
The datasheet claims 1: 5 upsampling is possible.
I don't know how the AD1892 inflects the sound. I will just try it just as Till as I am curious.

😕

 

[Õàëÿâùèê]

Hi, Elso!

From datasheet

Sample Rate Conversion from 8 kHz to 48 kHz with
1:5 Upsampling Range
......
Supply Voltage +5.0 V
Ambient Temperature 25 °C
Output Sample Frequency (FSOUT) 48.8 kHz
MCLK 25 MHz (512 ´ FSOUT)
Input Word Width 20 Bits
Load Capacitance 100 pF
All minimums and maximums tested except as noted.
..............................
DIGITAL TIMING

FMCLK MCLK Frequency (1/tMCP) 25 MHz
NOTES
Guaranteed, not tested.

Regards

 

[till]

Hi Till, So basically it is a reset problem as pin # 1 is the reset pin of the AD1892.

Yes

I assume you are using passive I to V conversion after the DAC but I never got it working right...

same for me, but with a 1k voltage divider instead of resistor 1k3 to GND its much better.

I use this only to test the 1892, i´m more happy with D1 stage as with passive.

Read this thread from a beginning. AD1892 is a artefact for audio . 1892 and good sound are not compatible!

Thats a strong statement.

I need a reciver chip for testing DAC circuits in exerimental circuits. The reciver will not be necessary for the final circuit, read here http://www.diyaudio.com/forums/showthread.php?s=&threadid=33138

The crystal chip is expensive, and i prefer a cheap solution for this purpose, this is why i want the 1892.

I test with spdif input, as i don´t want to risk my CD PRO2 when direct driving from I2S, and DSA controller for settinmg DAC mode is not ready yet. A better solution would be to have a cheap DSA controlled transport, but i can´t find one.


The sampling rate is not of interest as i don´t put in anything but 44,1k and i don´t need something special out. Only roundabout 44,1k out...

 

[alean]

Êàê ñ Âàìè ïî ìûëó ïîãîâîðèòü?

Óâ. ÕÀËßÂÙÈÊ
Êàê ñ Âàìè ïî ìûëó ïîãîâîðèòü?

 

[rfbrw]

The crystal chip is expensive, and i prefer a cheap solution for this purpose, this is why i want the 1892.

I would have thought the SAA7274, the CS8412 and the YM3623 were all cheaper than the AD1892.

 

[Jocko Homo]

You would think so.......

Not much that AD makes is inexpensive. Could be a problem of no good supplier close at hand.

Jocko

 

[till]

CS8412 and 8414 is expensive (for a poor tramp like me)

YM3623, SAA7274 i don´t even know where to buy

AD1892 the company who makes them gracefully donated me two of them.

 

[Õàëÿâùèê]

Hi
till

I need a reciver chip for testing DAC circuits in exerimental circuits. The reciver will not be necessary for the final circuit

Well, for experiments only🙂
Use any ÕÎ of any frequency by a range 22.5792......25MHz.
BTW, TI is company, who can donated for you DIR1701/1703😉. But these spdif-receivers are required TTL-level on an input. Use ADM1485 for it .

alean
ha_end( )rambler.ru

 

[Õàëÿâùèê]

till
For experiments with non-os AD1865, you need RJ-18bits mode from 1892. You can switch the mode of AD1892 with external additional microcontroller only. But 1892 don`t have 18bits output (16 or 20 bits only). You need to use the shift register for translating to required mode from default mode I2S-20 bits.

 

[till]

i´m just at looking for DIR1703 at TI. Do you have any schematic for interconnection of DIR1703 and ADM1485?