As part of an experiment I am looking into how best to replace the clocks feeding an Intel C222 chipset on a PC motherboard. The idea is to replace the crystals with XO clocks with separate power supplies. The power supply with be a 3.3v lifepo cell.
The suitable 25MHz XOs that I can find (eg https://uk.farnell.com/jsp/search/productdetail.jsp?SKU=2394158) appear to have an output signal voltage (high) of a minimum of 90% of VDD. Seeing as the lifepo outputs around 3.3v this means around 3v o/p signal voltage. However the chipset documentation states that the voltage should be no more than 1.2v.
I have read through a few threads on the subject of replacing clocks here and elsewhere but none seem to mention this issue. Is it a non-issue that I can ignore? Or, as I'm guessing that I shouldn't, how can I reduce the output of the clock with as little disruption to the signal as possible?
Many thanks,
Crom
The suitable 25MHz XOs that I can find (eg https://uk.farnell.com/jsp/search/productdetail.jsp?SKU=2394158) appear to have an output signal voltage (high) of a minimum of 90% of VDD. Seeing as the lifepo outputs around 3.3v this means around 3v o/p signal voltage. However the chipset documentation states that the voltage should be no more than 1.2v.
I have read through a few threads on the subject of replacing clocks here and elsewhere but none seem to mention this issue. Is it a non-issue that I can ignore? Or, as I'm guessing that I shouldn't, how can I reduce the output of the clock with as little disruption to the signal as possible?
Many thanks,
Crom
Hmmm, 64 views without comment...am I asking something really stupid?
I guess what I could do is to regulate the 3.3v output of the lifepo. Some clocks I've looked at allow a range of input voltage. This would then reduce the output signal level. But even so this lower level of the range is generally not low enough to get below a maximum output voltage of 1.2v.
I guess what I could do is to regulate the 3.3v output of the lifepo. Some clocks I've looked at allow a range of input voltage. This would then reduce the output signal level. But even so this lower level of the range is generally not low enough to get below a maximum output voltage of 1.2v.
The chip in question may have that limit to stop internal parasitic junctions becoming active within the IC, such as could occur with overdriving a clock input.
It is similar to analogue stuff like an opamp. If you overdrive an input past the supply voltage that the opamp is running on, then at some point something internally is going to conduct and cause either a latch up, or if enough current were available a destructive failure.
With complex chips its possible that a destructive latch up could occur anyway because there are "hidden" and inactive junctions that can trigger as if they were a thyristor when subject overvolts and cause a massive current to flow destroying the chip. Even the humble 555 timer has such a lurking issue just waiting to be triggered...
It is similar to analogue stuff like an opamp. If you overdrive an input past the supply voltage that the opamp is running on, then at some point something internally is going to conduct and cause either a latch up, or if enough current were available a destructive failure.
With complex chips its possible that a destructive latch up could occur anyway because there are "hidden" and inactive junctions that can trigger as if they were a thyristor when subject overvolts and cause a massive current to flow destroying the chip. Even the humble 555 timer has such a lurking issue just waiting to be triggered...
Thanks Mooly, so it sounds like something that I DO need to take account of. So, what is the best way of reducing the output 'power' of the signal down to a level that's compatible with the chip?
Tough question. A resistive divider would be problematic because of the frequencies involved and the effects of stray/input capacitance. It would need to be low impedance and that could put it outside the driving capabilities of the clock. To get it right attenuation wise would be trial and error using a wide bandwidth scope because of the "unknown" input its working into. It may or may not be a workable solution... I wouldn't like to say.
There will be other solutions such as a buffer that can accept a "high" level input while the buffer itself runs on a lower voltage.
There will be other solutions such as a buffer that can accept a "high" level input while the buffer itself runs on a lower voltage.
Yes, I agree regarding the divider. However, on the trichord site they recommend using a 1K resistor in series to reduce the clock signal in case you accidentally connect the clock to the output instead of the input during testing.
http://www.trichordresearch.co.uk/clock-fitting-instructions/
I've done some testing before I found this and there are two main clocks 25M and 32.xK. I've successfully replaced both individually and the pc boots and lays music. However, when I try to replace both clocks together no boot.
Perhaps this is because of the level of clock signals I'm introducing. I'll try the resistor trick but any other thoughts are welcome.
http://www.trichordresearch.co.uk/clock-fitting-instructions/
I've done some testing before I found this and there are two main clocks 25M and 32.xK. I've successfully replaced both individually and the pc boots and lays music. However, when I try to replace both clocks together no boot.
Perhaps this is because of the level of clock signals I'm introducing. I'll try the resistor trick but any other thoughts are welcome.
It always helps to scope the original to get an idea of the levels involved and to compare that with the replacement.
Clock signals are crucial in several respects. If you have more than one clock then even things such as the start up order could be significant. If one appears before the other or vice versa then some latch up or lock may occur.
Clock signals are crucial in several respects. If you have more than one clock then even things such as the start up order could be significant. If one appears before the other or vice versa then some latch up or lock may occur.
I have to ask why you want to replace them, clocks are the most critical signal on a PC, and in this case it would not have any affect on the audio. Especially the real time clock. I would recommend that you leave these devices as is, where they and the layout (critical with clocks) have been tested.
Agreed re critical nature of the signals and regarding the board designers choice of position. I was sceptical regarding the RTC and left the original intact initially, but swapping out the 25MHz clock feeding the intel chipset reaped such improved integration of the soundstage and just increased musicality - and I know all this sound like tosh but I'm only reporting it like I (and my up briefed other half) heard it - that I needed to try the RTC replacement. This did similar but to a lesser extent, so, given that I have to date been unable to boot the MB with both clocks replaced I have replaced the orig RTC and kept the new 25M.
Re your q about why I would like to replace them I'm not convinced that I do. The clocks I'm using as replacements are nothing special and I think it is actually the individual power supply per clock that is causing the benefit. Again, no evidence, merely speculation. The only reason that I did replace them was because I needed the 4pin variety that would accept their own supply.
Given your background, would you hazard a guess as to whether I need to take steps to reduce the output of the new clocks and how I might go about this? Alternatively any other suggestions as to what to try to get this to boot with both clocks replaced are more than welcome even though I understand your incredulity at my venture ;-)
Re your q about why I would like to replace them I'm not convinced that I do. The clocks I'm using as replacements are nothing special and I think it is actually the individual power supply per clock that is causing the benefit. Again, no evidence, merely speculation. The only reason that I did replace them was because I needed the 4pin variety that would accept their own supply.
Given your background, would you hazard a guess as to whether I need to take steps to reduce the output of the new clocks and how I might go about this? Alternatively any other suggestions as to what to try to get this to boot with both clocks replaced are more than welcome even though I understand your incredulity at my venture ;-)
I ran across this thread because I'm looking at replacing the 25MHz crystal on some cards in my PC.
Wondering why not use a low voltage oscillator, like this one
1.6 to 2.2v 25MHz osc
Connect it to a 1.6v supply, and you may still be a little over, but you'll be much closer
Or am I missing something?
Wondering why not use a low voltage oscillator, like this one
1.6 to 2.2v 25MHz osc
Connect it to a 1.6v supply, and you may still be a little over, but you'll be much closer
Or am I missing something?
No, you're not missing anything and thanks for the suggestion. That clock would fit my bill for a test (fast rise time but can't quickly see the frequency stability when I checked) with the exception of the voltage and that is only because I've found that the greatest benefit is gained when I use a lifepo A123 cell which is 3.3v
This goes back to the point I was talking to Marce about: that the benefit is not gained by replacing the clock itself and I agree with him that moving the clock away from the ground plane upon which they're originally mounted on the MB is not a good thing. The power supply appears to be the thing to concentrate on here and that's why I'm trying to find a workable solution that fits my parameters.
This goes back to the point I was talking to Marce about: that the benefit is not gained by replacing the clock itself and I agree with him that moving the clock away from the ground plane upon which they're originally mounted on the MB is not a good thing. The power supply appears to be the thing to concentrate on here and that's why I'm trying to find a workable solution that fits my parameters.
Well unfortunately life (and audio) is full of tradeoffs, you can't get everything.
I would not recommend running the chipset with an out of spec clock signal, sometime this works for a while but could lead to long term problems.
So you either get to make or buy a little reg to give you a lower voltage, or there are also level converter chips you can run the clock signal through to give you the desired level. Neither solution is perfect, and you may sacrifice some sound quality, or you can keep feeding the chipset a too high signal.
BTW, my H81 chipset uses the same datasheet, so I was just looking at it.
I think it allows Vcc+0.5V for max voltage, which would be 2.0V max. A little more but still not workable with a lifepo4 battery. But this might allow more clock options.
Randy
EDIT: BTW, I noticed in the Paul Pang site he has a bunch of disclaimers about his motherboard clock upgrade. I would bet this is why it works sometimes, and why it could break a chipset.
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BTW, if you do run the oscillator at 2V or so, you have many more options
oscillators
Seems like Mouser and Digikey have more options, don't know what other distributors are over there.
I plan to try running an oscillator with a little voltage reg next to it, and see how that sounds.
It's probably easier for me to try this since I never will have heard it with a lifepo4 and I won't know what I'm missing.
I also may try building a Sala Reflektor for it, I picked up a couple Reflector PWB's recently.
Randy
oscillators
Seems like Mouser and Digikey have more options, don't know what other distributors are over there.
I plan to try running an oscillator with a little voltage reg next to it, and see how that sounds.
It's probably easier for me to try this since I never will have heard it with a lifepo4 and I won't know what I'm missing.
I also may try building a Sala Reflektor for it, I picked up a couple Reflector PWB's recently.
Randy
So the Reflektor won't go down to 2V. It's min out is 3.3V. And I think that applies to most, if not all of the discrete linear regs people around here are using.
So my current plan is to use a little linear reg right next to the oscillator.
Thinking about trying the Silabs SI-590 series. I would need to give it 1.8 VDC to power it.
Other options include using a Silabs 590 or 501 series oscillator, and power it by creating a voltage divider from battery power. No idea if this would sound good or not, but wouldn't be too hard to try.
The 501 would be easier to try because it has a wide power input range, but it's specs aren't as good either.
So my current plan is to use a little linear reg right next to the oscillator.
Thinking about trying the Silabs SI-590 series. I would need to give it 1.8 VDC to power it.
Other options include using a Silabs 590 or 501 series oscillator, and power it by creating a voltage divider from battery power. No idea if this would sound good or not, but wouldn't be too hard to try.
The 501 would be easier to try because it has a wide power input range, but it's specs aren't as good either.
The amplitude of a clock signal can be reduced to any arbitrary level by using a capacitor divider.
I use exactly this method for clocking ARM Cortex M3 controllers, that have a 3.3V supply, and a rated maximum input voltage of 1.95V
Method:
Connect the oscillator to the INPUT pin (XI) via a Capacitor Ci. For 10-30MHz, 100pF NPO ceramic will suffice.
Next,connect a cap from XI to ground: call this Cg. NPO ceramics also required for Cg.
This reduces the clock amplitude by factor:
Ci / (Ci + Cg)
This method is used all the time in professional applications, use with confidence.
I use exactly this method for clocking ARM Cortex M3 controllers, that have a 3.3V supply, and a rated maximum input voltage of 1.95V
Method:
Connect the oscillator to the INPUT pin (XI) via a Capacitor Ci. For 10-30MHz, 100pF NPO ceramic will suffice.
Next,connect a cap from XI to ground: call this Cg. NPO ceramics also required for Cg.
This reduces the clock amplitude by factor:
Ci / (Ci + Cg)
This method is used all the time in professional applications, use with confidence.
Hi ! After hearing how good clocks affects on sound in DAC I'm interesting about modding motherboard clocks, think it will improve sound quality. Any user attempts to do this at modern boards ? As I understand it is better to start to try with minimal crystal voltage supply through capactitor at out. There are 4 clocks at my test MSI A320 board, one is for LAN (we ignore it), one near chipset (25Mhz) and two near CPU (48Mhz and unknown). Need help with identifiyng unknown crystal (lazy to disassembly PC and measure at now) and any new ideas and suggestions about this topic ?
