If no comments, the idea is good....
But first stage D3a also needs to be MU...
The SIT stage the simplest way to do it would be a resistive load whit 600R LCR...
The third stage is simple MU out....
There is also a possibility of an cathode follower in SIT stage, so we get very low output impedance and maybe can design a even lower impedance LCR network...
But first stage D3a also needs to be MU...
The SIT stage the simplest way to do it would be a resistive load whit 600R LCR...
The third stage is simple MU out....
There is also a possibility of an cathode follower in SIT stage, so we get very low output impedance and maybe can design a even lower impedance LCR network...
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