Hi Everybody.. i've been scanning this board and AA trying to find info about digital and analog grounding as well as voltages for a CS8414 / TDA1541A dac i'm building.
A few questions:
1) in a DAC that uses CS8414 and TDA1541A, do analog and digital ground ever contact? If so, where to they contact? (at the power supply or near the ICs)?
2) what type of on-board regulation is best? One design I saw (Lesha) uses 78L05s for the CS8414 and some complicated stuff for the TDA1541s.. Thorsten uses TL431s. I've tried using TL431s but I could not get the correct voltages with them (without ICs plugged in). for +/-5V, I was getting about 3.4V and for -15V I was getting about -10V..
3) should I use separate power supplies - one for digital and one for analog?
4) If I use a digital and analog power supply, how are each of the voltages on the TDA1541 to be treated? +5, -5, -15 : are these analog or digital?
5) I read somewhere that the CS8414 is to be treated as a digital IC even though it has digital and analog voltage supplies and grounds. Is this correct?
6) Is it necessary to re-clock the SDATA, FSYNC, SCK signals at all? If so, should all three be re-clocked? Lesha only reclocks SDATA and explained on AA that it was good enough for him. Elso prefers to reclock all three.
As you can tell, I'm really quite new at this!
A few questions:
1) in a DAC that uses CS8414 and TDA1541A, do analog and digital ground ever contact? If so, where to they contact? (at the power supply or near the ICs)?
2) what type of on-board regulation is best? One design I saw (Lesha) uses 78L05s for the CS8414 and some complicated stuff for the TDA1541s.. Thorsten uses TL431s. I've tried using TL431s but I could not get the correct voltages with them (without ICs plugged in). for +/-5V, I was getting about 3.4V and for -15V I was getting about -10V..
3) should I use separate power supplies - one for digital and one for analog?
4) If I use a digital and analog power supply, how are each of the voltages on the TDA1541 to be treated? +5, -5, -15 : are these analog or digital?
5) I read somewhere that the CS8414 is to be treated as a digital IC even though it has digital and analog voltage supplies and grounds. Is this correct?
6) Is it necessary to re-clock the SDATA, FSYNC, SCK signals at all? If so, should all three be re-clocked? Lesha only reclocks SDATA and explained on AA that it was good enough for him. Elso prefers to reclock all three.
As you can tell, I'm really quite new at this!
Hi,
So here are my 'personal' answers, the way i am building the dac (2*tda1541 post):
1) yes, at the dac. Then return the cs8414 gnd to dgnd. Return the analog output to agnd. Return the caps
(the many caps for the divider) to agnd. So no digital signals going back through gnd cross the analog
signals returnpath.
In general: do not cause loops in the gnd-plane. One side of the pcb fully gnd is
best.
2) I haven't descided yet, going to experiment.
3) Like 2, but i am going to.
4) As far a i heard, the +5 and -5 are returned through digital gnd and the -15 through analog gnd.
5) Guess so, but i am not using a cs..
6) Mmm, i am reclocking all with a new clock at the dac. Dunno with the cs841x versions..
Anybody with other views ???
Best regards,
Guido
So here are my 'personal' answers, the way i am building the dac (2*tda1541 post):
1) yes, at the dac. Then return the cs8414 gnd to dgnd. Return the analog output to agnd. Return the caps
(the many caps for the divider) to agnd. So no digital signals going back through gnd cross the analog
signals returnpath.
In general: do not cause loops in the gnd-plane. One side of the pcb fully gnd is
best.
2) I haven't descided yet, going to experiment.
3) Like 2, but i am going to.
4) As far a i heard, the +5 and -5 are returned through digital gnd and the -15 through analog gnd.
5) Guess so, but i am not using a cs..
6) Mmm, i am reclocking all with a new clock at the dac. Dunno with the cs841x versions..
Anybody with other views ???
Best regards,
Guido
HeadSh0T said:
Hi
This may give some information
http://members.chello.nl/~m.heijligers/DAChtml/Supply_decoupling.pdf
succes
Guido
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