I can now provide the Gerbers and information to build an interface board that supports a compact connection between JLSounds I2SoverUSB vIII FIO and PCM2DSD with support circuitry hosting 2 x XOs, relays to switch in the correct frequency, re-clocking for the DSD signals and a clock doubler to provide ext_clk to the JLSounds if 22/24Mhz XOs are used.
The design relies heavily on that generously provided by Markw4 and was conceived not as an alternative to his design but to complement it where space was limited and requirements weren't as general.
This is the link to Mark's design: https://www.diyaudio.com/community/threads/general-purpose-dac-clock-board.413001/
Below is the re-clocker fitted to one of my two RTZ DACs:
The BOM & Schematic is also attached together with a document with some notes and details of the options.
Please let me know if clarification is required on anything. Or if anyone finds errors in the BOM. I've tried to keep it in step but as you can see there have been a number of iterations so mistakes might creep in.
The v15 board has been tested on 3 RTZ DACs and found to be working well on a number of different sample rates and sources. However, I cannot guarantee that there won't be unforeseen cases where timing issues might arise as I can only test with my limited scope of hardware.
BOM calls for Crystek CCHD-957 devices but since the 4 pin Aries XO sockets are used (part number has been added to the BOM) then any pin compatible XO can be used,, such as the Ian Canada scPure. The Crystek XOs also require a conversion pcb, as seen in my photo above. I bought mine from Ian Canada. The scPure XOs already use the correct format for the sockets.
For DIY use only!
Edits:
8th Feb 2025: BOM updated. R9 value/
9th Feb 2025: Updated BOM for XO socket part number, added photo with scPure
The design relies heavily on that generously provided by Markw4 and was conceived not as an alternative to his design but to complement it where space was limited and requirements weren't as general.
This is the link to Mark's design: https://www.diyaudio.com/community/threads/general-purpose-dac-clock-board.413001/
Below is the re-clocker fitted to one of my two RTZ DACs:
The BOM & Schematic is also attached together with a document with some notes and details of the options.
Please let me know if clarification is required on anything. Or if anyone finds errors in the BOM. I've tried to keep it in step but as you can see there have been a number of iterations so mistakes might creep in.
The v15 board has been tested on 3 RTZ DACs and found to be working well on a number of different sample rates and sources. However, I cannot guarantee that there won't be unforeseen cases where timing issues might arise as I can only test with my limited scope of hardware.
BOM calls for Crystek CCHD-957 devices but since the 4 pin Aries XO sockets are used (part number has been added to the BOM) then any pin compatible XO can be used,, such as the Ian Canada scPure. The Crystek XOs also require a conversion pcb, as seen in my photo above. I bought mine from Ian Canada. The scPure XOs already use the correct format for the sockets.
For DIY use only!
Edits:
8th Feb 2025: BOM updated. R9 value/
9th Feb 2025: Updated BOM for XO socket part number, added photo with scPure
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Hi Cestrian,
Congratulations on bringing this project to a public release point!
May I ask with regard to optional use of ceramic caps (instead of MU) in some of the left-side board circuitry, was that done for possible cost savings purposes, or maybe to allow from some experimentation on the part of users?
In addition, would you like to like to make a recommendation as to any preferred clocks to use with this board (as only the sockets seem to be called out on the BOM)?
Also, do you have any recommendations for pre-regulators to produce the three mutually isolated +5v input power sources.
Best,
Mark
Congratulations on bringing this project to a public release point!
May I ask with regard to optional use of ceramic caps (instead of MU) in some of the left-side board circuitry, was that done for possible cost savings purposes, or maybe to allow from some experimentation on the part of users?
In addition, would you like to like to make a recommendation as to any preferred clocks to use with this board (as only the sockets seem to be called out on the BOM)?
Also, do you have any recommendations for pre-regulators to produce the three mutually isolated +5v input power sources.
Best,
Mark
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Excellent , big thanks to Cestrian and Markw4 for all the work put into this project . Mines currently running in with 22/24 Crystek 957
I'm currently using separate LM1084 supplies for the 5v pre regs , I'm going to try a 5v shunt for pre reg to the main LT1763 soon. I also hope to get Ian Canada 22mhz as last upgrade
I'm currently using separate LM1084 supplies for the 5v pre regs , I'm going to try a 5v shunt for pre reg to the main LT1763 soon. I also hope to get Ian Canada 22mhz as last upgrade
Although I haven't listened to this new clock board yet, I will build one at some point and try it out.
If it works as well expected, then the only real remaining problem to getting to what I think may very well compete with some of the best dacs in the world would be a better output stage for Marcel's RTZ dac. Don't know if we will be able to get a transformer manufacturer to do what would be wanted; it would be a pretty technically challenging problem. Next closest thing would probably be some combination of passive filter circuitry with some active buffering/gain. To keep RF from causing problems in any active electronics, maybe best to have passive filtering first, followed by some kind of JFET or MOSFET active circuitry. That would help keep forward biased semiconductor junctions from so easily demodulating any remaining RF and then mixing (multiplying) the demodulation products with the musical audio output signals. Likely another set of experiments would be needed to see what could be done for the particular dac.
If it works as well expected, then the only real remaining problem to getting to what I think may very well compete with some of the best dacs in the world would be a better output stage for Marcel's RTZ dac. Don't know if we will be able to get a transformer manufacturer to do what would be wanted; it would be a pretty technically challenging problem. Next closest thing would probably be some combination of passive filter circuitry with some active buffering/gain. To keep RF from causing problems in any active electronics, maybe best to have passive filtering first, followed by some kind of JFET or MOSFET active circuitry. That would help keep forward biased semiconductor junctions from so easily demodulating any remaining RF and then mixing (multiplying) the demodulation products with the musical audio output signals. Likely another set of experiments would be needed to see what could be done for the particular dac.
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The output stage is definitely something we need optimised for SE output . I personally prefer SE output with the FIRDAC , passive gave better quality than the op-amp stages but my setup would benefit from some active stage , unfortunately very little options regards suitable output transformers
Thanks for the good work.
Could I ask what exactly the use of u3, is it the speed doubler for the JLS ? What if using Amareno ?
I believe it needs a better description for the basic users than the little text file. Also it will not be ridiculous to include the Dr channel for user not using the Rtz but two PCM chips as the JLS is selectable for several dac chips, imho.
I can understand there are no isolator because the JLS has galvanic separation amready. However the fgpa is reclocked after and migth be too mucvh noisier ? Whatt if no galvanic isolation if using Amareno ?
Worth to use isolator for the 4 lines (but the Mclk) ?
Could I ask what exactly the use of u3, is it the speed doubler for the JLS ? What if using Amareno ?
I believe it needs a better description for the basic users than the little text file. Also it will not be ridiculous to include the Dr channel for user not using the Rtz but two PCM chips as the JLS is selectable for several dac chips, imho.
I can understand there are no isolator because the JLS has galvanic separation amready. However the fgpa is reclocked after and migth be too mucvh noisier ? Whatt if no galvanic isolation if using Amareno ?
Worth to use isolator for the 4 lines (but the Mclk) ?
@diyiggy,
The frequency doubler can be bypassed if a USB board needs 22/24MHz clocks.
Also, Amanero tends to sound better if run from clean +5v instead of USB power. However, this V15 board design is really intended for use with I2SoverUSB, rather than for Amanero.
A board like this except designed for use with Amanero would put MCLK behind an isolator so that Amanero only sees an isolated copy of MCLK. Also the Amanero I2S outputs should be isolated before going to the dac/reclocker. IOW, to do it right would require the design of a different clock board. Maybe a similar thing if you don't want to use PCM2DSD, although that would be easier to work around if someone wanted to use the V15 board and I2SoverUSB but without PCM2DSD.
The above having been said, if you want to design a different clock board for a different dac and or for a different USB board, and or if someone else wants to do it, I would be willing to provide some assistance if it would help.
Also, regarding the question of having galvanic isolation after PCM2DSD, its not clear if its really needed. Some experiments could probably be run using this V15 board and my reclocker board (or similar) to find out if galvanic isolation would help for the V15 board design. Since my boards were intended for more in the way of general purpose use, I included isolators on the reclocker board just in case they were needed.
The frequency doubler can be bypassed if a USB board needs 22/24MHz clocks.
Also, Amanero tends to sound better if run from clean +5v instead of USB power. However, this V15 board design is really intended for use with I2SoverUSB, rather than for Amanero.
A board like this except designed for use with Amanero would put MCLK behind an isolator so that Amanero only sees an isolated copy of MCLK. Also the Amanero I2S outputs should be isolated before going to the dac/reclocker. IOW, to do it right would require the design of a different clock board. Maybe a similar thing if you don't want to use PCM2DSD, although that would be easier to work around if someone wanted to use the V15 board and I2SoverUSB but without PCM2DSD.
The above having been said, if you want to design a different clock board for a different dac and or for a different USB board, and or if someone else wants to do it, I would be willing to provide some assistance if it would help.
Also, regarding the question of having galvanic isolation after PCM2DSD, its not clear if its really needed. Some experiments could probably be run using this V15 board and my reclocker board (or similar) to find out if galvanic isolation would help for the V15 board design. Since my boards were intended for more in the way of general purpose use, I included isolators on the reclocker board just in case they were needed.
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What is not clear to me is how the Mclk speed family is trigerred. I am not sure I understand the logic here.
I don't know if my question makes sense : in the scenario where the USB board is not slavered by the clock board, which output in the JLS or the Amanero or else USB to pcm boards, is triggering the rigth crystal on such master clock board and recloker, please ?
Hos the sample rate is detected ?
Migth be off topic and I appologize.
I don't know if my question makes sense : in the scenario where the USB board is not slavered by the clock board, which output in the JLS or the Amanero or else USB to pcm boards, is triggering the rigth crystal on such master clock board and recloker, please ?
Hos the sample rate is detected ?
Migth be off topic and I appologize.
There is a signal that goes from I2SoverUSB to the clock board (maybe called A0, the first sample rate status bit of I2SoverUSB; please note some USB boards may number the sample rate status bits using Fn -- e.g. F0 -- instead of using An). That first sample rate status bit tells the clock board which clock family is requested by the USB board. A relay on the clock board then switches to the correct clock family. A careful reading of I2SoverUSB and or Amanero documentation explains what the status bits tell you about the sample rate.
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The cost, agony and trouble coming from the "less stellar" choice to make two frequency families is appalling. Why o why.... over engineering defined....
//
//
A quick update and an apology.
I have found that the RC time-constant for the XOR based clock doubler is incorrect with the value for R9 that I have specified in the BOM. (402R)
The problem did not show itself when using Crystek XOs but when I swapped to the Ian Canada scPure the doubler failed to switch correctly.
I have now recalculated and changed the value of R9 to 100R. This now works perfectly with both Crystek and the scPure and the output waveform looks more symmetrical too.
I will update the BOM.
Sorry for any inconvenience caused.
I have found that the RC time-constant for the XOR based clock doubler is incorrect with the value for R9 that I have specified in the BOM. (402R)
The problem did not show itself when using Crystek XOs but when I swapped to the Ian Canada scPure the doubler failed to switch correctly.
I have now recalculated and changed the value of R9 to 100R. This now works perfectly with both Crystek and the scPure and the output waveform looks more symmetrical too.
I will update the BOM.
Sorry for any inconvenience caused.
Now I have one up and running too:
Sounds good. I would say its about the same as when I tried the scPure clocks using my clock board from the other thread. Pretty holographic. I would say probably the 2nd most holographic dac we have heard here. (The most holographic was the same RTZ FIRDAC dac except using Acko clocks in combination with my squaring board.)
Anyway, so far as I'm concerned this board is good to go. One might even say its an essential piece of support circuitry for @MarcelvdG RTZ dac, in that it sure beats a simple Amanero and PCM2DSD setup without reclocking, galvanic isolation, external clocks, etc. Quite a big difference there.
Sounds good. I would say its about the same as when I tried the scPure clocks using my clock board from the other thread. Pretty holographic. I would say probably the 2nd most holographic dac we have heard here. (The most holographic was the same RTZ FIRDAC dac except using Acko clocks in combination with my squaring board.)
Anyway, so far as I'm concerned this board is good to go. One might even say its an essential piece of support circuitry for @MarcelvdG RTZ dac, in that it sure beats a simple Amanero and PCM2DSD setup without reclocking, galvanic isolation, external clocks, etc. Quite a big difference there.
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Nice one looks great 👌
I’ve tried going back to standard i2soverusb setup and must admit much prefer it with the reclocking board . Cestrians put a lot of time in adding the updates and improvements to this board so big thanks to you both
Just need to try more SE active output stages now with the Marcel RTZ dac
I’ve tried going back to standard i2soverusb setup and must admit much prefer it with the reclocking board . Cestrians put a lot of time in adding the updates and improvements to this board so big thanks to you both
Just need to try more SE active output stages now with the Marcel RTZ dac
Dear Cestrian,
I have ordered the re-clocker board that you have generously shared with us.
I am going to build a second RTZ DAC with the following main goals.
So, after the above I would kindly ask the following:
Periklis
I have ordered the re-clocker board that you have generously shared with us.
I am going to build a second RTZ DAC with the following main goals.
- The most important thing for me is to get rid of the opamps, replacing them with tubes
- I would like to try your findings regarding re-clocking (it may prove the most important, I’ll let you know).
- I do not want to mess around with the 1st build, because I like it a lot, it is rather compact and services its purpose very well, so I decided to build a second one in a much bigger chassis, so I am able to evaluate safely, different filters, output stages, etc.
So, after the above I would kindly ask the following:
- Is it possible to avoid both relays, (I am going to use only 1 clock for start)
- Do you think that I2SoUSB ver.III is sufficient, versus the Fully Isolated later version, for solid conclusions regarding the value of the re-clocker, or should I go for the FI version from the start ?
- Of course, the most important q is, can it be done, does it make sense to you???? (The scheme I have in mind is HQplayer->USB-> I2SoUSB->Re-clocker->RTZ)
Periklis
Hello Periklis,
To answer your questions:
1. Yes, you could do without both relays but you'll need to bridge across the first relay with a small wire link
2. The issue with the non isolated version of the I2SoverUSB is that the pin-outs differ somewhat. So although you might be able to make it work you would need to wire across the needed pins. (you can't mount it on the DIL headers) Plus of course you won't get the advantages of the galvanic isolation. Personally I would recommend the FIO version.
3. Yes, I'm sure it can be done, it is just a little different to the original design idea so you will have to wire across the DSD signals (additional wire links) between the connections where the PCM2DSD would be to bypass it. I guess I could've added these tracks with solder links but I was really only intending to use PCM2DSD so it didn't occur to me.
https://www.mouser.co.uk/ProductDetail/232-25MU106MD15750
https://www.mouser.co.uk/ProductDetail/232-35MU475MC44532
Quite expensive!
You can use ceramic instead but Mark highly rates these caps in that location so I used them in mine and have no complaints.
the 0.22u ones are on the XOs and on the reclocking d-flipflops and the clock buffer.
To answer your questions:
1. Yes, you could do without both relays but you'll need to bridge across the first relay with a small wire link
2. The issue with the non isolated version of the I2SoverUSB is that the pin-outs differ somewhat. So although you might be able to make it work you would need to wire across the needed pins. (you can't mount it on the DIL headers) Plus of course you won't get the advantages of the galvanic isolation. Personally I would recommend the FIO version.
3. Yes, I'm sure it can be done, it is just a little different to the original design idea so you will have to wire across the DSD signals (additional wire links) between the connections where the PCM2DSD would be to bypass it. I guess I could've added these tracks with solder links but I was really only intending to use PCM2DSD so it didn't occur to me.
No, ones near the LDO are 4u7 and 10u MU Acrylic Rubycon.
https://www.mouser.co.uk/ProductDetail/232-25MU106MD15750
https://www.mouser.co.uk/ProductDetail/232-35MU475MC44532
Quite expensive!
You can use ceramic instead but Mark highly rates these caps in that location so I used them in mine and have no complaints.
the 0.22u ones are on the XOs and on the reclocking d-flipflops and the clock buffer.
I am thinking about this one from audiodesignguide after 3rd order Butterworth filter,
https://www.audiodesignguide.com/DAC_Output/index2.html
@pgour
There may be some issues with the older version of I2SoverUSB and or with bypassing PCM2DSD.
The first problem is that IME the non-FI version of I2SoverUSB III can't export a 22/24MHz MCLK signal when it is running from external clocks (which would be needed for PCM2DSD).
The other problem is that without the latency of PCM2DSD then the reclocker D-flip flop setup and hold timing may be shifted to where the reclocking doesn't work. If you have a 100MHz or better scope you should be able to check and possibly make some adjustment with damping resistors to introduce a delay, enough to make it work anyway. If it needs more retiming than that then you might design a delay board to substitute for PCM2DSD.
Mark
There may be some issues with the older version of I2SoverUSB and or with bypassing PCM2DSD.
The first problem is that IME the non-FI version of I2SoverUSB III can't export a 22/24MHz MCLK signal when it is running from external clocks (which would be needed for PCM2DSD).
The other problem is that without the latency of PCM2DSD then the reclocker D-flip flop setup and hold timing may be shifted to where the reclocking doesn't work. If you have a 100MHz or better scope you should be able to check and possibly make some adjustment with damping resistors to introduce a delay, enough to make it work anyway. If it needs more retiming than that then you might design a delay board to substitute for PCM2DSD.
Mark
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