Originally posted by Pierre
Conclusion: PWM chips CAN be used for Class-D half bridge designs, but several questions must be had in mind, such as WHERE to implement slow-start and overcurrent, as well as feedback. We will try to build a high-power one based on SG3525 (or UC3825 for better fidelity)
Best regards,
Pierre
Hi Guys,🙂
Perhaps some of you have read the post of Lumanauw with a title "How to fix this sch?" then it was followed by several sch that was shown by Pierre's PDF sch, my UC3525, then Workhorse SG2524.
This is the the reason why I open up a new post and "Quoted" Pierres conclusion attached, because it simply sparks an encouraging challenge and interest on my part and perhaps some of you also regarding the implementation of soft start, over current protector, and the use of negative feedback in using the ubiquitous and cheap PWM controller chips.
The sch that I have just designed took almost two days to finish(seven cups of coffee😉) due to some challenging task like the elusive soft start, but fortunately, the over current and the negative fb were implemented.
I just want to emphasize that the circuit is not yet tried and tested "on the amplification side" but on the "bare TL494" alone(some caps and resistors) mounted on a breadboard + scope+ headphone, the sound is "WOW!". I preffer to use TL494 as one of my Pet b'coz it sounds more presentable compared to UC3525.
I am obliging you to download the PDF file of Texas Instrument with title "Designing switching voltage regulators with TL494" via Google b'coz most of your questions can be answered easily by reffering on that PDF file..
Also note that my schematic is my original design but you can use it freely for educational purposes or thesis alike. Of coarse you can modify or improvised it as you like b'coz it is an open source design and no copyright issue. However, I am not liable to any consequencial circumstances that may arise in using it or to accept a blame for damaging your property
Ok!!! Do you have the PDF now? If not yet then get it now and
lets talk about the sch....
There you go.............
Best regards,
Choy
An externally hosted image should be here but it was not working when we last tested it.
Hi guys,
I've noticed that when the over current starts, opamp NE5532 will shutdown the SD pin of IR2011 to logic 1 but the TL494 will still inject signal to the i/p of IR2011, so I add extra bias to the unused opamp of Tl494 so that this will forced down the o/p duty cycle of TL494 to minimum....
Do you have the PDF now? Then lets rock!!
Here is the added correction for it..
Cheers
Choy
I've noticed that when the over current starts, opamp NE5532 will shutdown the SD pin of IR2011 to logic 1 but the TL494 will still inject signal to the i/p of IR2011, so I add extra bias to the unused opamp of Tl494 so that this will forced down the o/p duty cycle of TL494 to minimum....
Do you have the PDF now? Then lets rock!!
Here is the added correction for it..
An externally hosted image should be here but it was not working when we last tested it.
Cheers
Choy
Hi Ledmania,
Have you seen "A diode is connected between the output of error amp and input of comparator" in the datasheet of TL494....
I think this diode might restrict analogue signal funtioning properly.....
Your Schematic:
The Feedback isn't referenced to exact midpoint "as seen by TL494", its taken from the output ....whose level of voltage isn't in co-relation to GND....Therefore a Level Shifter is must required at the output of TL494 to reference its output to -VRail of mosfets.....
Instead of TL494 you should try UC3825B from TEXAS INSTRUMENTS for much better results in HI-FI domain .....We are also working on this Chip based kilowatt level power outputs.....
regards,
K a n w a r
Have you seen "A diode is connected between the output of error amp and input of comparator" in the datasheet of TL494....
I think this diode might restrict analogue signal funtioning properly.....
Your Schematic:
The Feedback isn't referenced to exact midpoint "as seen by TL494", its taken from the output ....whose level of voltage isn't in co-relation to GND....Therefore a Level Shifter is must required at the output of TL494 to reference its output to -VRail of mosfets.....
Instead of TL494 you should try UC3825B from TEXAS INSTRUMENTS for much better results in HI-FI domain .....We are also working on this Chip based kilowatt level power outputs.....
regards,
K a n w a r
Hi Kenwar,
thanks for looking in the schematic. I am really looking for a sharp guys like you to comment on the drawing because more comments means more corrections will be made😉.
Yes I am fully aware of the diode connected at the o/p of the two error amps but as I have mentioned earlier that the real PDF that we must use should be the one that shows the detailed "transistor" connections of the entire circuit which I have a copy of it. According to my PDF, the diode that you are reffering to is a transistor buffer connected as "emiter follower" to block each of their two positive going signal in case the user use them both.
So there will be no restriction on any analog signal that will pass there.
On the next paragraph of you comment regarding midpoint bias of the error amp, the data sheet says that "when the o/p of the error amp modulates from 0.5V to 3.5V, the o/p duty cycle will vary from 97% to 0%"in reverse order! So the proper bias point on this is to get the average voltage of 0.5V+3.5Vdevide by 2,you will get 2V. this will correspond to an o/p of 48.5%.bingo!.
So, 2V should be the quiescent bias voltage at the i/p...
Kenwar, this is a nice topic but I am "obliging" you to download the PDF file mentioned. You will see that there are more than 100 transistors that were use inside the chip and you can easily grasp any application you want on that chip if you have that PDF.
On your last paragraph, YES, That UC3825 is my most favorite choice of chip but they are not availble here and you have to order online .
The TL494 is very cheap and available here thats why I made it as my model circuit 😀
Best regards,
ledmania
thanks for looking in the schematic. I am really looking for a sharp guys like you to comment on the drawing because more comments means more corrections will be made😉.
Yes I am fully aware of the diode connected at the o/p of the two error amps but as I have mentioned earlier that the real PDF that we must use should be the one that shows the detailed "transistor" connections of the entire circuit which I have a copy of it. According to my PDF, the diode that you are reffering to is a transistor buffer connected as "emiter follower" to block each of their two positive going signal in case the user use them both.
So there will be no restriction on any analog signal that will pass there.
On the next paragraph of you comment regarding midpoint bias of the error amp, the data sheet says that "when the o/p of the error amp modulates from 0.5V to 3.5V, the o/p duty cycle will vary from 97% to 0%"in reverse order! So the proper bias point on this is to get the average voltage of 0.5V+3.5Vdevide by 2,you will get 2V. this will correspond to an o/p of 48.5%.bingo!.
So, 2V should be the quiescent bias voltage at the i/p...
Kenwar, this is a nice topic but I am "obliging" you to download the PDF file mentioned. You will see that there are more than 100 transistors that were use inside the chip and you can easily grasp any application you want on that chip if you have that PDF.
On your last paragraph, YES, That UC3825 is my most favorite choice of chip but they are not availble here and you have to order online .
The TL494 is very cheap and available here thats why I made it as my model circuit 😀
Best regards,
ledmania
I will look at your schematics in more detail tomorrow, but at first sight, it definitley needs level shifting. You are mixing two stages with different references: the input/modulator (around TL494), that is referenced to GND, and the output driver/mosfets, that are always referenced to the most negative point in the circuit, in your case, the negative rail. (it would simply bang! as you are shortcircuiting GND and -Vrail!)
I suppose you have got confused by Kanwar schematics, that don't use level-shifting: that's because it uses unipolar supply (that is, only one rail) referenced to GND, so this is the most negative potential and there is no problem in having the IR2xxx driver referenced to it, and then no level shifting is needed. This circuit has application only if there are two equal halves and speaker is connected differentially between both of them, with inputs shifted 180º, so the speaker sees no DC.
But for simplicity, it is better to have a single half-bridge stage, so bipolar rails are needed and hence level shifting.
I will post a more advanced schematics for you to have things a little bit more clear.
Best regards,
Pierre
I suppose you have got confused by Kanwar schematics, that don't use level-shifting: that's because it uses unipolar supply (that is, only one rail) referenced to GND, so this is the most negative potential and there is no problem in having the IR2xxx driver referenced to it, and then no level shifting is needed. This circuit has application only if there are two equal halves and speaker is connected differentially between both of them, with inputs shifted 180º, so the speaker sees no DC.
But for simplicity, it is better to have a single half-bridge stage, so bipolar rails are needed and hence level shifting.
I will post a more advanced schematics for you to have things a little bit more clear.
Best regards,
Pierre
Pierre said:I will look at your schematics in more detail tomorrow, but at first sight, it definitley needs level shifting. You are mixing two stages with different references: the input/modulator (around TL494), that is referenced to GND, and the output driver/mosfets, that are always referenced to the most negative point in the circuit, in your case, the negative rail. (it would simply bang! as you are shortcircuiting GND and -Vrail!)
Hi Pierre,
Please take a look at the sch once more and notice that there are two reference points of signal involved... The "arrow" symbol at the end terminal of the speaker... And the "inverted triangle" as the global ground...
Now, the signal on the o/p is passed onto the speaker referenced to neutral "arrow" symbol which is the center point of your supply.
But, the small signal is commutated at the i/p of the error amp with reference to global groung (inverted triangle).
Naturally, all of the biasing and i/p schemes must be accomplished in reference to global ground(inverted triangle).
Now, take a look at the sch again that the feedback was tapped at the o/p which is 1/2 of VCC referenced to global ground, then voltage divide by R14 and R15 to get that 2v required to bias the error amp i/p with referenced to ground again. It is simple isnt it?
Now, from the o/p side of the TL494 that triggers the two scmitt inverters then triggers the hi side and low side of IR2011, every thing was referenced to digital global ground and levelshifting is not needed.
All hi/lo side fet drivers used levelshifting to interface their o/p to a much higher voltage while preserving their digital input capability. this means that both inputs doesnt need level shifting and must be triggered with referenced to global ground.
best regards
ledmania
another correction on my sch
Hi,
I've noticed that when the over current occurs, the o/p of NE5532 may source to its own Vcc (12V) that may overdrive the pin 1 i/p of TL494, so I change it to 5V (to be connected to pin 14 of TL494).
So, there you go....
Cheers
ledmania
Hi,
I've noticed that when the over current occurs, the o/p of NE5532 may source to its own Vcc (12V) that may overdrive the pin 1 i/p of TL494, so I change it to 5V (to be connected to pin 14 of TL494).
So, there you go....
An externally hosted image should be here but it was not working when we last tested it.
Cheers
ledmania
Let's see.
Please correct me if I am misunderstanding your sch, but I see this:
- You have bipolar rails, -50VDC and +50VDC.
- Pins 2 and 13 of the IR2010 (COM and VSS, respectively), are joined together, which is OK as VSS must be the same as COM (most negative point). So your "12VDC" must be referrenced to the negative rail, or you will be feeding the input stage of the IR2010 with 62V !!!
- Your "inverted triangle" symbol is at the same potential as -50V, or at the same potential as supply center tap (GND) ?
Please clarify this and if all is true so far, I can keep trying to debug the sch.
Please correct me if I am misunderstanding your sch, but I see this:
- You have bipolar rails, -50VDC and +50VDC.
- Pins 2 and 13 of the IR2010 (COM and VSS, respectively), are joined together, which is OK as VSS must be the same as COM (most negative point). So your "12VDC" must be referrenced to the negative rail, or you will be feeding the input stage of the IR2010 with 62V !!!
- Your "inverted triangle" symbol is at the same potential as -50V, or at the same potential as supply center tap (GND) ?
Please clarify this and if all is true so far, I can keep trying to debug the sch.
Pierre said:Let's see.
Please correct me if I am misunderstanding your sch, but I see this:
- You have bipolar rails, -50VDC and +50VDC.
- Pins 2 and 13 of the IR2010 (COM and VSS, respectively), are joined together, which is OK as VSS must be the same as COM (most negative point). So your "12VDC" must be referrenced to the negative rail, or you will be feeding the input stage of the IR2010 with 62V !!!
- Your "inverted triangle" symbol is at the same potential as -50V, or at the same potential as supply center tap (GND) ?
Pierre,
-pins 2 and 13 of IR2010 are joined together and is common to global ground which is -50V.
-all terminal nodes with a "inverted triangle" are all connected to global ground which is -50V.
Now, The VCC and VDD of both TL494 and IR2010 are all tied to this +12V node..please take note that the -12V is also tied to -50V as the digital global ground.
now,when TL494 triggers IR2010's i/p to logic "1", this means Tl494 will source +12V(set aside Vdrop) on its o/p relative to global ground. There is no way you could get 62V.
Same is true when it triggers to logic "0", It mean sink or Vsat.. there is also no way you could get 62V here either.
Pierre, please dont be confused with "neutral" arrow symbol of the center tap of the supply because this is "exclussively" for speaker neutral only. Nothing more, nothing less and should not be included in analyzing any signal flow with global ground. Just leave it alone and forget it😀
Pierre said:
Please clarify this and if all is true so far, I can keep trying to debug the sch.
Thats rights Pierre, I want someone will scrutinize it, debug it, or comment on it so that more comments means more corrections will be made, then more beter amp will come forth...
Regards,
ledmania
About the basic setup of the circuit:
That's what I wanted to confirm: if you are referencing all to -50V, that's ok (I tried that once) , but you will have to be very careful with the design of feedback.
Now with the feedback setup:
As you have pointed out, your 50% duty cycle point will be _around_ 2V input to the error opamp, producing 0V at the output.
So, if you have 0V at the output, you will have 50V difference between output and -50V rail, ok so far? Then your voltage at junction between R14 and R15 will be 50*400/(4600+400)=4V, not 2V (referred to -50V, of course). So you need to modify the resistors, for example, R15=220 ohm and R14=4.7k aprox.
Anyway, I don't like this way of introducing the offset, as it will be dependant on supply voltage. Perhaps you should try something related to Vref, that is quite estable.
Let's continue...
That signal is then lowpass-filtered by 22k+100pF (72KHz aprox), and enters to the positive input of TL494. Shouldn't it go to the negative input? (Yes, it should IMHO). So I think you have connected the inputs of the error amplifier backwards.
Now it rests to check if the polarity of the PWM signals is ok or backwards. Remember that the output stage is inverting as you have connected it.
all terminal nodes with a "inverted triangle" are all connected to global ground which is -50V.
That's what I wanted to confirm: if you are referencing all to -50V, that's ok (I tried that once) , but you will have to be very careful with the design of feedback.
Now with the feedback setup:
As you have pointed out, your 50% duty cycle point will be _around_ 2V input to the error opamp, producing 0V at the output.
So, if you have 0V at the output, you will have 50V difference between output and -50V rail, ok so far? Then your voltage at junction between R14 and R15 will be 50*400/(4600+400)=4V, not 2V (referred to -50V, of course). So you need to modify the resistors, for example, R15=220 ohm and R14=4.7k aprox.
Anyway, I don't like this way of introducing the offset, as it will be dependant on supply voltage. Perhaps you should try something related to Vref, that is quite estable.
Let's continue...
That signal is then lowpass-filtered by 22k+100pF (72KHz aprox), and enters to the positive input of TL494. Shouldn't it go to the negative input? (Yes, it should IMHO). So I think you have connected the inputs of the error amplifier backwards.
Now it rests to check if the polarity of the PWM signals is ok or backwards. Remember that the output stage is inverting as you have connected it.
I have set-up a small circuit for sumulation of the offset, gain, etc, issues.
I have tried your feedback proposal (of course, with the error amplifier polarity corrected, that is, entering by the - input), and the problem is the one I suspected:
You can adjust the voltage divider resistors for zero offset at the output, but as soon as the rails move a little bit, the adjustment is ruined and it is not corrected by the feedback loop.
You need to relate all to a estable reference, like Vref. But that's not easy without level shifting.
If you see my proposed simulation schematics, I found a way to have no DC offset at the output, with a unipolar-fed input stage, such as a PWM controller. But it was sitting on GND , not -Vss, and hence required level shifting.
I doubt if it worths the pain to try to elliminate the level shifting stage at any cost: in fact it only adds a transistor and a couple of resistors and solves a lot of problems, so I would leave it and reference the input circuitry to GND (0V)!
I have tried your feedback proposal (of course, with the error amplifier polarity corrected, that is, entering by the - input), and the problem is the one I suspected:
You can adjust the voltage divider resistors for zero offset at the output, but as soon as the rails move a little bit, the adjustment is ruined and it is not corrected by the feedback loop.
You need to relate all to a estable reference, like Vref. But that's not easy without level shifting.
If you see my proposed simulation schematics, I found a way to have no DC offset at the output, with a unipolar-fed input stage, such as a PWM controller. But it was sitting on GND , not -Vss, and hence required level shifting.
I doubt if it worths the pain to try to elliminate the level shifting stage at any cost: in fact it only adds a transistor and a couple of resistors and solves a lot of problems, so I would leave it and reference the input circuitry to GND (0V)!
Pierre said:About the basic setup of the circuit:
That's what I wanted to confirm: if you are referencing all to -50V, that's ok (I tried that once) , but you will have to be very careful with the design of feedback.
Now with the feedback setup:
As you have pointed out, your 50% duty cycle point will be _around_ 2V input to the error opamp, producing 0V at the output.
So, if you have 0V at the output, you will have 50V difference between output and -50V rail, ok so far? Then your voltage at junction between R14 and R15 will be 50*400/(4600+400)=4V, not 2V (referred to -50V, of course). So you need to modify the resistors, for example, R15=220 ohm and R14=4.7k aprox.
Anyway, I don't like this way of introducing the offset, as it will be dependant on supply voltage. Perhaps you should try something related to Vref, that is quite estable.
Pierre nooo!
Maybe you lost your eye glasses again! LOL!😀
Please verify your comment on your first paragraph....
Pierre said:
So, if you have 0V at the output, you will have 50V difference between output and -50V rail, ok so far?
I absolutely disagree because at 50% duty cycle(no music) the o/p after the filter is 0 in referenced to center tap neutral....But!!! On the o/p referenced to global ground.....drum roll... you will get +25V...
look at the sch please. did you see the 25V???😀
This 25V is devided by R15 and R14 to seat at 2 volts..Please recalculate you ohms law here now.😀
Pierre said:
Let's continue...
That signal is then lowpass-filtered by 22k+100pF (72KHz aprox), and enters to the positive input of TL494. Shouldn't it go to the negative input? (Yes, it should IMHO). So I think you have connected the inputs of the error amplifier backwards.
Now it rests to check if the polarity of the PWM signals is ok or backwards. Remember that the output stage is inverting as you have connected it.
Pierre,
Did you download the PDF that I mentioned on the very beginning of this post? if not then "GOTO" my reply to Kenwar regarding the input of the error amp relative to its o/p duty cycle...the o/p is reverse in response to its output....
Regards
ledmania
Pierre,
Here is my reply based on your comment on the non inverting input that I use....Please read it carefully...
Regards
ledmania
Here is my reply based on your comment on the non inverting input that I use....Please read it carefully...
ledmania said:
On the next paragraph of you comment regarding midpoint bias of the error amp, the data sheet says that "when the o/p of the error amp modulates from 0.5V to 3.5V, the o/p duty cycle will vary from 97% to 0%"in reverse order! So the proper bias point on this is to get the average voltage of 0.5V+3.5Vdevide by 2,you will get 2V. this will correspond to an o/p of 48.5%.bingo!.
So, 2V should be the quiescent bias voltage at the i/p...
Best regards,
ledmania
Regards
ledmania
Let's see if we are looking at the same sch...
I am looking at the attached image in Post #1 of this same Thread. Is this correct?
I am looking at the attached image in Post #1 of this same Thread. Is this correct?
Hi ledmania,
nice idea, do you have a "working" simulation from it?
Can you put it here with symbols and subcircuits?
I think it will work BUT only if you have c o n s t a n t powersupplys.
If not, you need a 2. divider from ps-midpoint to get a new reference!
Iam too lazy to check all polaritys.
May be you need some C between pin 3 and 15 from TL494.
Regards
Heinz!
nice idea, do you have a "working" simulation from it?
Can you put it here with symbols and subcircuits?
I think it will work BUT only if you have c o n s t a n t powersupplys.
If not, you need a 2. divider from ps-midpoint to get a new reference!
Iam too lazy to check all polaritys.
May be you need some C between pin 3 and 15 from TL494.
Regards
Heinz!
Pierre said:Let's see if we are looking at the same sch...
I am looking at the attached image in Post #1 of this same Thread. Is this correct?
Well, I hope that you are looking at the right sch because I dont see any other sch around here except mine. Unless you accidentally hit lumanauw's thread button. LOL!😀
Pierre,
Yes you are looking at my post #1..
Please pay attention to the detail of the sch and contemplate on it carefully because there are some flaw on it but I'm not going to exposed it yet because I'm waiting for more adept guys that will notice it.
I think that my kirchhoffs voltage law know how is just working fine so the voltage drops on each identified nodes are just ok.
Regards
ledmania
powerbecker said:Hi ledmania,
nice idea, do you have a "working" simulation from it?
Can you put it here with symbols and subcircuits?
I think it will work BUT only if you have c o n s t a n t powersupplys.
If not, you need a 2. divider from ps-midpoint to get a new reference!
Iam too lazy to check all polaritys.
May be you need some C between pin 3 and 15 from TL494.
Regards
Heinz!
Hi Hienz!
I have no working simulations on it because I dont have the software yet but I hope soon😉. I just used my old technic of using breadboard+scope+headphone.
BTW, Thank you for your suggestion in putting C on pin 3 and 15 of TL494 but I think it will suppress the hi frequency response of the opamp that may negate the concept of full spectrum hi fi in which this sch was intended to.
Regards
ledmania
I don't know if this has been discussed but...
What about the fact that the 494 will only go to about 96% duty cycle?
There is a voltage source in the DT input. To overcome it, you can run pin 4 slightly below ground. You have to be careful not to go too low because the IC could be damaged. Simply go low enough to overcome the voltage source (~0.15 volts).
What about the fact that the 494 will only go to about 96% duty cycle?
There is a voltage source in the DT input. To overcome it, you can run pin 4 slightly below ground. You have to be careful not to go too low because the IC could be damaged. Simply go low enough to overcome the voltage source (~0.15 volts).
Perry Babin said:I don't know if this has been discussed but...
What about the fact that the 494 will only go to about 96% duty cycle?
There is a voltage source in the DT input. To overcome it, you can run pin 4 slightly below ground. You have to be careful not to go too low because the IC could be damaged. Simply go low enough to overcome the voltage source (~0.15 volts).
Hi Perry,
Your first question..er..concern I mean, about the chips duty cycle has a lot of sense indeed.
This is based on the fact that the o/p cant go less than 3%duty at 0 volt and 100%duty at 3V on pin 4(b'coz of that 110mv offset voltage).
Based on my scope, the chip cant go higher than 95% at 200khz on my proto using pin 4 as the modulating source.
But hey Perry, even you disable the two error amps and use pin 4 dead time pin as your sound i/p, with simple potentiometer bias on Vref, it still produce WOW! sound. LOL!😀 And yes its true.
Humm, I'm going to give a try on your suggestion on u'r second paragraph..
Well!!, Nice shot Perry..
Regards
ledmania
Hi LEDMANIA,
I am Kanwar ...not Kenwar ...Mind it....
Yes you were right about the Diode was an emmiter follower....
The design topology you are using isn't worth because it has many basic Flaws.... which aren't simply to ignore,
Pierre has showed it you, i think....
Hi Pierre,
Even if you referenced the TL494 to GND ...Its input NODE and the Feedback Node From Speaker Aren' t at perfect Zero ref with each other , because the GND of error amp is actually its -Vrail and Vref is +Vrail...You have to ascertain that and it requires carefull understanding for that too
The output of Half Bridge is cocentric with GND...not VREF/2..and for proper operation inverting node of error amp must be at Vref/2 cocentric with output node of HB...
regards,
K a n w a r
I am Kanwar ...not Kenwar ...Mind it....
Yes you were right about the Diode was an emmiter follower....
The design topology you are using isn't worth because it has many basic Flaws.... which aren't simply to ignore,
Pierre has showed it you, i think....
Hi Pierre,
Even if you referenced the TL494 to GND ...Its input NODE and the Feedback Node From Speaker Aren' t at perfect Zero ref with each other , because the GND of error amp is actually its -Vrail and Vref is +Vrail...You have to ascertain that and it requires carefull understanding for that too
The output of Half Bridge is cocentric with GND...not VREF/2..and for proper operation inverting node of error amp must be at Vref/2 cocentric with output node of HB...
regards,
K a n w a r
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