Cascoded jfet buffer

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rbroer

rbroer

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Joined 2002
#1
I've been looking into some buffers like Borbely and others and tried to add some ideas together.
Output DC offset will be handled upstream of the fet input
The input fet now operates constant power.

Any pitfalls and hints and suggestions ?
 

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#7
Re: Re: Cascoded jfet buffer

Steve Eddy said:
Is this for driving loudspeakers or something?

se
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amplifierguru said:
Hi rbroer,

I trust the input FET is going to be gate biassed from somewhere?

Also I think you're biassing T4 from the +18V rail, wouldn't it be a good idea for C1 to bypass to that?

Seems to me unnecessarily convoluted for a simple need. please define your intent.

Cheers,
Greg
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An externally hosted image should be here but it was not working when we last tested it.


I found link to this very old thread (with 1900 views and no reply)
at Pedja Rogic gainclone page.
http://users.verat.net/~pedjarogic/audio/gainclone/gainclone.htm

He refers his solution to this thread
and also to a Nelson Pass paper:
Cascode Amp Design: by Nelson Pass
 
#9
What is the value/purpose of C2? C1 will form a well defined pole with R1, but the C2 seems to form a pole with the rather variable ( part-to-part and temperature dependent ) transconductance of the input JFET.
 
#10
amplifierguru said:
Hi rbroer,

I trust the input FET is going to be gate biassed from somewhere?

Also I think you're biassing T4 from the +18V rail, wouldn't it be a good idea for C1 to bypass to that?

Seems to me unnecessarily convoluted for a simple need. please define your intent.

Cheers,
Greg
Click to expand...

In the circuit in post 1:

The input FET should have some resistance to 0V reference or "ground" of the +/-18V supply, 1M to 10M is fine. No "ground" point is shown in the schematic, a glaring omission.

C1 provides low AC impedance from T4 gate to output, for current to drive T4 Cgd, just what you would want for a bootstrap cascode with highish Cgd. With 10mA sink current I would choose a JFET with high Idss and Vp instead of a power MOSFET, something like PN4391, connect R4 to output and dispense with C1,R6,R7. Yes there should be power supply bypass caps but in this schematic there is no 0V to connect to.

I have to wonder how stable the T1/T2/T3 compound feedback triple is. I've had enough trouble with oscillation in CFPs. Has anyone actually built this?

Post 1 is about 31 months old but rbroer has posted recently so a reply may come.

What is the value/purpose of C2? C1 will form a well defined pole with R1, but the C2 seems to form a pole with the rather variable ( part-to-part and temperature dependent ) transconductance of the input JFET.
Click to expand...

The link in post 7 doesn't offer any clear explanation. I agree with this, but given 1/gm=33 ohms the -3db of C2 and 33 ohms is about 150kHz, well outside the audio range, so the variability might not matter. I would check for any signs of oscillation on the 2SK170 source.
 
#11
Post 1 is about 31 months old but rbroer has posted recently so a reply may come.
Click to expand...
Yes, this would be fine. I also have seen he is around.

Regarding C2 in the gainclone circuit, I also find difficult to see the reason.
I dont know if Nelson Pass paper, PDF link above, on Cascoding will have something on this.

JLTi-Nov04.gif


Joe Rasmussen does not use such a capacitor in his tube buffered gainclone, JLTi MK2.
http://www.customanalogue.com/
 
#12
Joe Rasmussen does not use such a capacitor in his tube buffered gainclone, JLTi MK2.
Click to expand...

Hmmm - looks like the BJT emitter voltage depends on the BJT base current, not a good design practice, better to add a resistor in parallel with the bootstrap capacitor. This voltage must be high enough for the plate but not too high so that the BJT saturates on positive peak input.
 
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