Burning Amp BA-3

Looking at the schematic for the FE, the EE's here are wondering how the Jfets turn on to be able to pull the voltage down without any voltage being present on the +inputs. Basically, there's no voltage present at the gates of the input Jfets, so how do they get turned on when setting up the bias?
 
Good EE's just confused. We put a 1Vpp signal generator on the input. Jfets are working fine. O-scope on the output FETs. No response from the output FET's at all, either side. Cranking up P1 and P2 results in nothing.

What value pot are you using for P1 and P2? 1K or 500R?

My BA-3 FE w/fairchild mosfets took many, many turns to bias up. I thought I was going to run out of pot. If you are using a 500 ohm pot for P1 and P2 you may need a 1K (or more) pot intead.
 
What value pot are you using for P1 and P2? 1K or 500R?

My BA-3 FE w/fairchild mosfets took many, many turns to bias up. I thought I was going to run out of pot. If you are using a 500 ohm pot for P1 and P2 you may need a 1K (or more) pot intead.

500 for both pots. I've turned the pots limit-limit and nothing happened. I have more Fairchild pots coming in tomorrow. So far, they seem to be what's wrong. We're getting a nice sine wave through everything up to the FET's, but no output from the FET at all.
 
do not change value of fixed resistors in JFet drains

increase value of trimpots or put series resistor in series with (just) existing pot (so pot and additional resistor are bypassed with capacitor)

start adding 500R resistor there , back up pots to zero , prior to powering up and setting procedure

while you are there - what's voltage across JFet source resistors (10R on schmtc) ?

for you and greenhorn EE's - JFets are depletion mode devices ...... that would explain how they are biased

same as triodes ..... but that's from previous life , obviously