Nothing to do with Self. A good idea in principal, provided minor loop stability remains unaffected.
mikeks said:Nothing to do with Self. A good idea in principal, provided minor loop stability remains unaffected.
The "Prince" has spoken.
forr said:Hi
---Conventional Miller compensation can degrade PSRR because one end of the Miller capacitor is referenced to signal while the other end (at the base of the VAS) is effectively referenced to the supply rail. In this scheme, both ends of the compensating capacitor are referenced to clean signal nodes.---
Is this Self's idea in the convetional scheme a good one : to connect the other end of the Miller capacitor to the emitter of a common base bipolar (base referenced to ground) in a cascode input stage ?
this paper shows some options for ground referencing the miller compensation for psrr improvement, as well as pointing out that true diff output amps can have superior psrr
try:
http://citeseer.ist.psu.edu/cache/p...hip-between.pdf
google or citeseer should be able to find it given the reference info:
E. Sackinger, J. Groette, and W. Guggenbuhl, “A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement,” IEEE Trans. Circuits And Systems, vol. 38, pp 1171-1181, October 1983
the "physics math" is a little weird, but circuits and explainations on the later pages should be accessable to most here
forr said:Hi
---Conventional Miller compensation can degrade PSRR because one end of the Miller capacitor is referenced to signal while the other end (at the base of the VAS) is effectively referenced to the supply rail. In this scheme, both ends of the compensating capacitor are referenced to clean signal nodes.---
Is this Self's idea in the convetional scheme a good one : to connect the other end of the Miller capacitor to the emitter of a common base bipolar (base referenced to ground) in a cascode input stage ?
Hi forr,
Of course it's feasible. In the absence of a cascode stage you might consider a capacitor, equal to the Miller cap, between gnd and the input of the current mirror.
Cheers
http://www.diyaudio.com/forums/showthread.php?s=&threadid=94676&perpage=10&pagenumber=57
Hey Bob.
Here is a quick post just for now of a sim (before I go to bed) to show the high frequency peaking caused by the interaction I mentioned earlier between the two feedback paths.
The peak is 8dB at ~700kHz.
Cheers,
Glen
Here is a quick post just for now of a sim (before I go to bed) to show the high frequency peaking caused by the interaction I mentioned earlier between the two feedback paths.
The peak is 8dB at ~700kHz.
Cheers,
Glen
Hi JCX,
Thanks for help. I found
E. Sackinger, J. Groette, and W. Guggenbuhl, “A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement”
in nine files in PNG format here, other links to PDF files didn't work :
http://citeseer.ist.psu.edu/cachedpage/432448/1
to
http://citeseer.ist.psu.edu/cachedpage/432448/9
Hi Estuart,
---In the absence of a cascode stage you might consider a capacitor, equal to the Miller cap, between gnd and the input of the current mirror.---
http://www.diyaudio.com/forums/show...0&pagenumber=57
So, for a Simple Pole Compensation, just short-circuiting C15 and R3, removing C7 and R14, and using C6 as the traditionnal Miller cap minimises the power supply injection due to the virtual ground at the input of Q24 being not refered to real 0V ? Great ! Is Self ignoring that ?
Thanks for help. I found
E. Sackinger, J. Groette, and W. Guggenbuhl, “A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement”
in nine files in PNG format here, other links to PDF files didn't work :
http://citeseer.ist.psu.edu/cachedpage/432448/1
to
http://citeseer.ist.psu.edu/cachedpage/432448/9
Hi Estuart,
---In the absence of a cascode stage you might consider a capacitor, equal to the Miller cap, between gnd and the input of the current mirror.---
http://www.diyaudio.com/forums/show...0&pagenumber=57
So, for a Simple Pole Compensation, just short-circuiting C15 and R3, removing C7 and R14, and using C6 as the traditionnal Miller cap minimises the power supply injection due to the virtual ground at the input of Q24 being not refered to real 0V ? Great ! Is Self ignoring that ?
jcx/Forr,
thanks for posting.
Great thread continued, including Mr Bob's appealing sense of humor.
(Laplace transformation is considered physics mathematics? 😱 )
thanks for posting.
Great thread continued, including Mr Bob's appealing sense of humor.
(Laplace transformation is considered physics mathematics? 😱 )
forr said:Hi Estuart,
---In the absence of a cascode stage you might consider a capacitor, equal to the Miller cap, between gnd and the input of the current mirror.
So, for a Simple Pole Compensation, just short-circuiting C15 and R3, removing C7 and R14, and using C6 as the traditionnal Miller cap minimises the power supply injection due to the virtual ground at the input of Q24 being not refered to real 0V ? Great ! Is Self ignoring that ?
Hi forr,
Exactly. Perhaps you can fine tune the arrangement even further, by adding a small series resistor. I'll have a look at some old schematics of mine.
Concerning D. Self, well, this is not the only thing he has ignored, for example the merits of power MOSFETs.
His opinion on MOSFETs was solely based on a few simulations, using primitive spice models and thus ignoring the so called weak inversion.
Cheers,
jcx said:
this paper shows some options for ground referencing the miller compensation for psrr improvement, as well as pointing out that true diff output amps can have superior psrr
try:
http://citeseer.ist.psu.edu/cache/p...hip-between.pdf
google or citeseer should be able to find it given the reference info:
E. Sackinger, J. Groette, and W. Guggenbuhl, “A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement,” IEEE Trans. Circuits And Systems, vol. 38, pp 1171-1181, October 1983
the "physics math" is a little weird, but circuits and explainations on the later pages should be accessable to most here
forr said:Hi JCX,
Thanks for help. I found
E. Sackinger, J. Groette, and W. Guggenbuhl, “A General Relationship Between Amplifier Parameters, And Its Application to PSRR Improvement”
in nine files in PNG format here, other links to PDF files didn't work :
http://citeseer.ist.psu.edu/cachedpage/432448/1
to
http://citeseer.ist.psu.edu/cachedpage/432448/9
Hi Estuart,
---In the absence of a cascode stage you might consider a capacitor, equal to the Miller cap, between gnd and the input of the current mirror.---
http://www.diyaudio.com/forums/show...0&pagenumber=57
So, for a Simple Pole Compensation, just short-circuiting C15 and R3, removing C7 and R14, and using C6 as the traditionnal Miller cap minimises the power supply injection due to the virtual ground at the input of Q24 being not refered to real 0V ? Great ! Is Self ignoring that ?
Actually, this technique is due to Messrs Ribner and Copeland. I can send the .pdf to interested folk.
Ciao!
G.Kleinschmidt said:Hey Bob.
Here is a quick post just for now of a sim (before I go to bed) to show the high frequency peaking caused by the interaction I mentioned earlier between the two feedback paths.
The peak is 8dB at ~700kHz.
Cheers,
Glen
Hi Glen,
Thanks, but I think you are staying up too late. The combination of the 1 ohm series output resistor and the 0.5 uF shunt capacitor introduces an extra pole into the circuit at about 300 kHz that causes this peaking. Any such load capacitance in a real amplifier should be isolated by an L-R network.
Try the sim without the 1 ohm resistor and 0.5 uF capacitor, and make sure you use wideband op amps.
Bob
mikeks said:
Actually, this technique is due to Messrs Ribner and Copeland. I can send the .pdf to interested folk.
Ciao!
Mike, please send me that pdf to bob@cordellaudio.com.
Thanks.
> Mike, please send me that pdf to bob@cordellaudio.com.
And me also, with most sincere thanks :
ybpkwan@yahoo.com
Patrick
And me also, with most sincere thanks :
ybpkwan@yahoo.com
Patrick
mikeks said:Actually, this technique is due to Messrs Ribner and Copeland. I can send the .pdf to interested folk.
Ciao!
Hi Mike,
Of course, this trick is quite obvious. Anyhow, I'd love to see that paper.
Cheers,
Bob Cordell said:
Hi Glen,
Thanks, but I think you are staying up too late. The combination of the 1 ohm series output resistor and the 0.5 uF shunt capacitor introduces an extra pole into the circuit at about 300 kHz that causes this peaking. Any such load capacitance in a real amplifier should be isolated by an L-R network.
Try the sim without the 1 ohm resistor and 0.5 uF capacitor, and make sure you use wideband op amps.
Bob

forr said:So, for a Simple Pole Compensation, just short-circuiting C15 and R3, removing C7 and R14, and using C6 as the traditionnal Miller cap minimises the power supply injection due to the virtual ground at the input of Q24 being not refered to real 0V ? Great ! Is Self ignoring that ?
From the little bit of Self that I have read with regards to this, he seems to be saying that the degradation of PSSR due to the miller compensation capacitor is so small that the standard miller capacitor compensated VAS circuit doesn't warrant further complication. He seems to advocate simple R-C filtering of the diff amp and VAS supply rails instead. Personally, I have seen very few published amplifier designs that can match D Self’s amplifier designs in both measured performance and simplicity.
Cheers,
Glen
forr said:Conventional Miller compensation can degrade PSRR because one end of the Miller capacitor is referenced to signal while the other end (at the base of the VAS) is effectively referenced to the supply rail. In this scheme, both ends of the compensating capacitor are referenced to clean signal nodes.---
Is this Self's idea in the convetional scheme a good one : to connect the other end of the Miller capacitor to the emitter of a common base bipolar (base referenced to ground) in a cascode input stage ?
estuart said:Hi forr,
Of course it's feasible. In the absence of a cascode stage you might consider a capacitor, equal to the Miller cap, between gnd and the input of the current mirror.
Originally posted by mikes
True. R-C filtering very effective.
Hi Kleinschmidt and Andy,
Applying a RC filter is beside the point. forr asked how to improve the PSRR, NOT how to improve the PSU by a more than obvious RC filter.
Of course you can do both, however RC filtering has some limitations in its own right. According to Self: "Elegant or not, the simplest way to reduce the ripple below the noise floor seems to be brute-force RC filtering of the negative supply...requires a large RC time-constant...The real snag is that the necessary voltage drop across R directly reduces amplifiers output swing."
Cheers,
estuart said:
Hi Kleinschmidt and Andy,
Applying a RC filter is beside the point. forr asked how to improve the PSRR, NOT how to improve the PSU by a more than obvious RC filter.
But isolating the low power circuits such as the diff amp, the VAS and the biasing circuitry/current sources, etc from the output stage with a simple R-C filter in each rail does indeed improve an amplifiers PSRR.
Cheers,
Glen
mikeks said:True![]()
😡
Will you stop agreeing with me. You gonna give me a bad name.
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