Bob Cordell Interview: BJT vs. MOSFET

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#1,822
john curl said:
By the way, Bob. What do you know about the parasitic transistor in each and every fet that you like to compare to? If you want to know more, contact SY and he can send some important info to you.
Click to expand...


Not a lot, but I'll look into it. I believe that it does not come into play under normal forward-biased conditions, and that its parasitics in forward operation are taken into account in the spec sheet capacitances. I've never had occasion for it to give me any trouble. We also must keep in mind the built-in clamp diode that prevents the DS from being reverse-biased.

Cheers,
Bob
 
#1,825
You had better check out that parasitic transistor, Bob. It severely curtails high frequency performance in RF designs, so it might effect rate-of-change conditions as well. It comes on in forward bias, above a few Mega-Hz operation. I researched it through Ed Oxner, who sent his research to me, and then I sent it on to SY. Power fets are 'imperfect', what a concept! ;-)
 
#1,827
john curl said:
You had better check out that parasitic transistor, Bob. It severely curtails high frequency performance in RF designs, so it might effect rate-of-change conditions as well. It comes on in forward bias, above a few Mega-Hz operation. I researched it through Ed Oxner, who sent his research to me, and then I sent it on to SY. Power fets are 'imperfect', what a concept! ;-)
Click to expand...


Hi John,

I remember talking to Ed Oxner at Siliconix a long time ago. He's a good guy. Is he still at Siliconix or whatever they call themselves these days?

Yes, all of these devices are imperfect; it's a matter of pick your poison then dealing with it.

Could you email me a copy of that work to me at bob@cordellaudio.com?

Thanks!
Bob
 
#1,829
Hi,
I just wanted to ask if we shouldn't be thinking in terms of gate charge rather than gate capacitance? Also, isn't this very non-linear as you turn the FET on in the active region. I know the IR P devices are the worst. I assume all vertical channel devices suffer from this in varying degrees?

Bob,
Have a great vacation!

Thanks,
-Chris
 
#1,834
Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

G.Kleinschmidt said:
Nelsons THD figures were presented without any mention of load impedance, power output, specific frequency, output stage topology (single-ended / bridged?) or number of output devices used, or bias current. All that is completely clear to me about Nelson's output stage in question is that it uses complementary P/N MOSFET's.

I can assume, for the sake of the argument, that his Class A output stage with 0.1 and 0.06% THD is identical in every other respect to the hypothetical 100W class A stage put forth by you, but that would seem a coincidence. For this reason, I did explicitly ask Nelson if this was the case (for the purpose of making a more accurate comparison - particularly with regards to your hypothetical 0.5% THD figure) but I was ignored.

Finally, as far as I can tell, ultra-low THD isn’t one of Nelson’s design aims, and this hasn't hindered his business successes. Now I could be wrong, but I doubt that he really cares if I don’t like his THD figures. We are each entitled to design to a specification that we personally see fit.
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I picked an apples-to-apples example of a 100W Class A
Source follower output stage without feedback or error
correction. The distortion quoted was at 100 watts into 8
ohms. I thought that was clear.

Also, I was not citing the performance of any product - I saw the
question and I had such an example in my files.

Regarding the last paragraph, I like utra-low low distortion as
well as anybody else, but it's not my boss.

😎
 
#1,835
Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

Nelson Pass said:


I picked an apples-to-apples example of a 100W Class A
Source follower output stage without feedback or error
correction. The distortion quoted was at 100 watts into 8
ohms. I thought that was clear.

Also, I was not citing the performance of any product - I saw the
question and I had such an example in my files.

Regarding the last paragraph, I like utra-low low distortion as
well as anybody else, but it's not my boss.

😎
Click to expand...


OK, fair enough.
If I can bug you with a couple of other niggling questions though:
How many parallel connected MOSFET pairs were used and was the stage actually biased for Class A to 100W in 8ohms (Iq=2.5A) or for a lower impedance with a higher bias current (say 4ohms)?

Cheers,
Glen
 
#1,836
Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

G.Kleinschmidt said:
How many parallel connected MOSFET pairs were used and was the stage actually biased for Class A to 100W in 8ohms (Iq=2.5A) or for a lower impedance with a higher bias current (say 4ohms)?
Click to expand...

The particular case was 3 parallel devices of the IRF240 type
but with a Fairchild P channel part. Bias was 2.5A, and the
Source resistors were .47 ohm.

By way of illuminating this further, some of the best numbers
came from the X600, which did not operate the output stage
in a loop, ran a 2.5A Class AB bias, and of course had no
EC circuit. It measured .01% at 100W.

It did, however, benefit from 12 devices in parallel.

😎
 
#1,837
Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: Re: I repeat my Request

Nelson Pass said:


The particular case was 3 parallel devices of the IRF240 type
but with a Fairchild P channel part. Bias was 2.5A, and the
Source resistors were .47 ohm.

By way of illuminating this further, some of the best numbers
came from the X600, which did not operate the output stage
in a loop, ran a 2.5A Class AB bias, and of course had no
EC circuit. It measured .01% at 100W.

It did, however, benefit from 12 devices in parallel.

😎
Click to expand...


Alrighty......

My prototype was a more manageable 50W class A stage using 3 pairs of the Sanken devices mentioned earlier.

Using the difference nulling technique, to the best I was able to determine, the THD was in the vicinity of ~0.02% into 8R, reasonably consistent throughout the audio band. Bias was about 2A.

Cheers,
Glen
 
#1,838
john curl said:
You had better check out that parasitic transistor, Bob. It severely curtails high frequency performance in RF designs, so it might effect rate-of-change conditions as well. It comes on in forward bias, above a few Mega-Hz operation. I researched it through Ed Oxner, who sent his research to me, and then I sent it on to SY. Power fets are 'imperfect', what a concept! ;-)
Click to expand...


Hi John,

I looked over the paper by Ed Oxner, and see what you are referring to.

There are a couple of caveats that appear to greatly mitigate the concern. First, the Oxner paper was written in 1980 and was referring to V-FETs (V-groove vertical FETs, a bit different from MOSFETs like the HEXFETs). So some things that are geometry-dependent may be quite different.

Ed addressed two matters: the parasitic NPN transistor itself, and the parasitic capacitances associated with it.

He pointed out that the parasitic NPN was very unlikely to turn on and to not be a likely contributor to performance up to 400 MHz. The mechanism whereby it would turn on would be current through the drain overlap capacitance working against the effective base resistance of the parasitic NPN. In his example (which was a fairly small VFET), the capacitance was 21 pF and the resistance was 1.4 ohms, so a rather extraordinary rate-of-voltage-change would have to be occurring at the drain to produce a Vbe of voltage across that 1.4 ohm resistance to turn on the parasitic NPN.

His second point was in reference to the parasitic capacitance and resistance of the parasitic NPN which exist even when the NPN is not turned on. The main one again being the drain overlap capacitance, whose main effect will be seen in the drain-substrate parasitic, since its path to the gate is first shunted by the 1.4 ohm parasitic NPN base resistance (see his Figure 3). To first order, it would appear that these would be largely lumped in with Cds and Cgd of the MOSFET.

Also, these capacitances will be very strongly dependent on device geometry details, so it is a little hard to speculate on their size in a MOSFET with a HEXFET structure. It would be very interesting to see what Ed would say about these effects in today's MOSFETs.

Thanks again for bringing this paper to my attention.

Cheers,
Bob
 
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