Re: Taming The Vertical Limits...
Hi Kanwar,
Yes, I saw that. I hope that Vishay will take good care of that line and not discontinue products like the 240/9240. Of course, there are now other vendors of equivalent parts, so that should mitigate any consequences.
I think there are three reasons why Verticals give some designers so much trouble, and I blew up verticals for all three reasons myself, especially in my early days of working with them.
The reasons are: 1) they are very fast devices and can be prone to oscillation in certain designs/layouts; 2) their gate structure is fragile from the point of view of its breakdown voltage of 20V being exceeded for any reason; 3) they do not have beta degradation at high currents (the fact that BJTs have beta degradation at high currents may be a mitigating factor in short circuit conditions, assuming that the driver then does not go into secondary breakdown trying to drive them).
A fourth reason could be thermal runaway and/or current hogging among paralleled verticals. Although verticals can provide superior bias stability to BJTs when properly applied, we cannot forget that they have a positive TC of Id at the currents where they are usually biased, and that it must be dealt with thoughtfully. Although some designs do not use source ballast resistors with verticals (and I have been guilty of that as well), the presence of source ballast resistors can mitigate current hogging at higher currents among paralleled verticals, especially under fault conditions.
Cheers,
Bob
Workhorse said:
Workhorse said:
Hi Kanwar,
Yes, I saw that. I hope that Vishay will take good care of that line and not discontinue products like the 240/9240. Of course, there are now other vendors of equivalent parts, so that should mitigate any consequences.
I think there are three reasons why Verticals give some designers so much trouble, and I blew up verticals for all three reasons myself, especially in my early days of working with them.
The reasons are: 1) they are very fast devices and can be prone to oscillation in certain designs/layouts; 2) their gate structure is fragile from the point of view of its breakdown voltage of 20V being exceeded for any reason; 3) they do not have beta degradation at high currents (the fact that BJTs have beta degradation at high currents may be a mitigating factor in short circuit conditions, assuming that the driver then does not go into secondary breakdown trying to drive them).
A fourth reason could be thermal runaway and/or current hogging among paralleled verticals. Although verticals can provide superior bias stability to BJTs when properly applied, we cannot forget that they have a positive TC of Id at the currents where they are usually biased, and that it must be dealt with thoughtfully. Although some designs do not use source ballast resistors with verticals (and I have been guilty of that as well), the presence of source ballast resistors can mitigate current hogging at higher currents among paralleled verticals, especially under fault conditions.
Cheers,
Bob
Hello Bob,
You know Vishay has aquired almost 85 companies from past 10 years which are engaged in electronic component manufacturing Industry...A big Crocodile - Vishay now eats IRF another big Fish....just like Microsemi aquired APT.....
Your comments on Mosfets issues are valid....
One more thing I observed collectively with another engineer friend is that when Verticals are subjected to high Currents + High VDS [Just like in Short Circuit conditions and reactive loading] the Cgd drain to source capacitance increase very rapidly...which tends to couple the voltage spikes from drain to gate and inturns causes the Vgs directly across the device excluding Rgate to rise abnormaly, unless zener clamping is used for each mosfet to prevent this...
VMOS are very fast in action to get destroyed easily than Bipolars as there current gain is almost infinite to some extent...the gate must be clamped as fast as you can in order to protect them during plain Short circuit with full voltage drive at input....
There are 3 ways to manage :
1. Muting of input signal of amp
2. Clamping Vgs to near zero[if possible clamp it negatively]
3. Large diameter output inductor which helps in absorbing the current spikes[could also be used as current transformer to sense the current flowing through it]
regards,
Kanwar
You know Vishay has aquired almost 85 companies from past 10 years which are engaged in electronic component manufacturing Industry...A big Crocodile - Vishay now eats IRF another big Fish....just like Microsemi aquired APT.....
Your comments on Mosfets issues are valid....
One more thing I observed collectively with another engineer friend is that when Verticals are subjected to high Currents + High VDS [Just like in Short Circuit conditions and reactive loading] the Cgd drain to source capacitance increase very rapidly...which tends to couple the voltage spikes from drain to gate and inturns causes the Vgs directly across the device excluding Rgate to rise abnormaly, unless zener clamping is used for each mosfet to prevent this...
VMOS are very fast in action to get destroyed easily than Bipolars as there current gain is almost infinite to some extent...the gate must be clamped as fast as you can in order to protect them during plain Short circuit with full voltage drive at input....
There are 3 ways to manage :
1. Muting of input signal of amp
2. Clamping Vgs to near zero[if possible clamp it negatively]
3. Large diameter output inductor which helps in absorbing the current spikes[could also be used as current transformer to sense the current flowing through it]
regards,
Kanwar
Re: Re: Taming The Vertical Limits...
They are favorites of mine also.
I guess I have been lucky, never having problems with
reliability with power Mosfets. I've personally put over a million
of them into the field, and through Adcom maybe twice that.
😎
Bob Cordell said:
They are favorites of mine also.
I guess I have been lucky, never having problems with
reliability with power Mosfets. I've personally put over a million
of them into the field, and through Adcom maybe twice that.
😎
Re: Re: Re: Taming The Vertical Limits...
Hi Nelson,
You've designed for Adcom?
I guess I've lost track of Adcom designs and did not realize they were using vertical MOSFETs in their output stages.
Bob
Nelson Pass said:
Hi Nelson,
You've designed for Adcom?
I guess I've lost track of Adcom designs and did not realize they were using vertical MOSFETs in their output stages.
Bob
Workhorse said:
Yes, these are good points. There are additional ways of handling these issues as well.
Cheers,
Bob
Re: Re: Re: Re: Taming The Vertical Limits...
I did the original GFA555 in the early 80's, and moved them
to IRF240 and 9240 Mosfets in 1992. My role was to do the
concept amps, which represented first production, and over time
their staff would introduce alterations (everybody wants to be a
designer).
😎
Bob Cordell said:
I did the original GFA555 in the early 80's, and moved them
to IRF240 and 9240 Mosfets in 1992. My role was to do the
concept amps, which represented first production, and over time
their staff would introduce alterations (everybody wants to be a
designer).
😎
Duhh,
i thought you also did the GFP750 and 715 models, as well as the current Adcom power amp flagship, the 5802 !
i thought you also did the GFP750 and 715 models, as well as the current Adcom power amp flagship, the 5802 !
I did the 5800. The 5802 was heavily modified by the production
house they sent it to. Whether it was better or not is anybody's
guess.
house they sent it to. Whether it was better or not is anybody's
guess.
Try +15V and 0V on base.
-15V is probably negative enough to make a b-e junction work at zener range. I do not know how a collector works then, but this is not a 'normal' switch-off in my guess.
-15V is probably negative enough to make a b-e junction work at zener range. I do not know how a collector works then, but this is not a 'normal' switch-off in my guess.
In that drawing, what happens when the leftside of 10k base resistor is given -15V? Is it forming somekind of capacitor between signal and ground (together with 1k forming LPF)? I look at the datasheet of 2SC1815, nothing strange, internal capacitance is very small.
This is confusing 😀 something very basic, yet I don't know how a transistor works.
Hi, Darkfenriz, I will try your suggestion. If it still robs the highs, do you have other suggestion?
This is confusing 😀 something very basic, yet I don't know how a transistor works.
Hi, Darkfenriz, I will try your suggestion. If it still robs the highs, do you have other suggestion?
lumanauw said:
David,
Even when it is off, it still represents a capacitance. That capacitance may cause lpf effects. In the 80'ies, a lot of people here in Europe removed the muting transistors from their DACs for the same reason you mention.
Jan Didden
Hi,
the transistor will work for +ve voltages above the zero volt at the emitter.
But when the input signal goes -ve the transistor is reverse biased.
I don't know what happens to it when that reverse is applied.
JLH recommends a FET for this duty, 2n5459.
Is a FET immune to reverse voltages?
the transistor will work for +ve voltages above the zero volt at the emitter.
But when the input signal goes -ve the transistor is reverse biased.
I don't know what happens to it when that reverse is applied.
JLH recommends a FET for this duty, 2n5459.
Is a FET immune to reverse voltages?
Re: Re: Re: Re: Re: Taming The Vertical Limits...
Hi Nelson,
What were your reasons for moving Adcom from BJTs to MOSFETs?
Bob
Nelson Pass said:
Hi Nelson,
What were your reasons for moving Adcom from BJTs to MOSFETs?
Bob
Reason 1 - I was getting such good results from Mosfets in my
own product that I wanted to share them with my high-paying
client.
Reason 2 - Adcom had a very aggressive purchasing manager,
and I could tap into their volume pricing on the parts.
😎
own product that I wanted to share them with my high-paying
client.
Reason 2 - Adcom had a very aggressive purchasing manager,
and I could tap into their volume pricing on the parts.
😎
Hi, Janneman,
Thanks for the info 😀 Removing this muting transistor makes better sound, but leaves turn-on/turn-off thump 😀
Thanks for the info 😀 Removing this muting transistor makes better sound, but leaves turn-on/turn-off thump 😀
lumanauw said:
You can also Try Jfet, or a special Transistor made for muting purposes for analog signals...DTC100K
lumanauw said:
I like to use small reed relays here - but that depends a bit on the timing of the mute. If this is a power-on mute, you need to check whether it comes quick enough to block the turn-on thump, and here reeds become critical as they are slower than a transistor. But worth a try.
Jan Didden