My design is a symmetrical IPS > VAS > EF > Darlington arrangement. Where is the best location for the bias servo? Between the VASs or between the EFs?
The bias servo is thermal compensation. It's attached to the output transistors or heatsink to regulate the idle current. I can wire it between my VAS transistor collectors or between the driver emitters. VAS is 2.5mA. Drivers are 10mA.
I prefer to install the bias spreader between the collectors of the VAS. That way its end-to-end impedance is effectively reduced by a factor of Beta. The Beta of the driver transistors. It also runs at lower current so there's less self-heating, and I don't want a thermal sensor to heat itself and spoil the measurement.
Output servo is for DC offset voltage & its drift compensation. It's an integrator with a very long time constant, like 10 whole seconds. It looks at the speaker terminals and applies slow, long term corrections to the input stage to null out any DC present at the speaker terminals. The long time constant is used so that the servo will not attempt to null out very low bass program material.
The LTP handles DC offset in this amp.
My original issue is using a symmetrical IPS with current mirrors and a hexfet OPS. Cold idle current is 0. I have to warm the mirror to get things going. I intended to swap in a darlington OPS but I can't drive them off the VAS. I needed to add a driver in EF configuration which makes it a triple darlington OPS. My mosfet PCB layouts had the bias servo across the VAS emitters (OPS gates). If I change to triple darlington, I'll have to rewire the bias servo to the VAS stage (before the drivers) and I don't have the room on the PCB for the additional traces/connections needed. I could do a 3 conductor wire lead to the VAS but that's a difficult option in the space available.
Now what I think I'll do is a CFP VAS so I can run the current VAS at a higher current without loading the LTP, and leave the bias servo connected like it was. The VAS will run 8~10ma which is more then I'd like to have flowing through my bias transistor but it's the easiest solution at this time. Since the voltage across the bias servo is only four Vbe, it's only 40mW to dissipate. This shouldn't cause any excessive heating of the bias servo.
I'll try and post some pictures soon. 1000 words can't explain the hole I've trapped myself in.
My original issue is using a symmetrical IPS with current mirrors and a hexfet OPS. Cold idle current is 0. I have to warm the mirror to get things going. I intended to swap in a darlington OPS but I can't drive them off the VAS. I needed to add a driver in EF configuration which makes it a triple darlington OPS. My mosfet PCB layouts had the bias servo across the VAS emitters (OPS gates). If I change to triple darlington, I'll have to rewire the bias servo to the VAS stage (before the drivers) and I don't have the room on the PCB for the additional traces/connections needed. I could do a 3 conductor wire lead to the VAS but that's a difficult option in the space available.
Now what I think I'll do is a CFP VAS so I can run the current VAS at a higher current without loading the LTP, and leave the bias servo connected like it was. The VAS will run 8~10ma which is more then I'd like to have flowing through my bias transistor but it's the easiest solution at this time. Since the voltage across the bias servo is only four Vbe, it's only 40mW to dissipate. This shouldn't cause any excessive heating of the bias servo.
I'll try and post some pictures soon. 1000 words can't explain the hole I've trapped myself in.
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If your input stage is a differential pair, then the DC nulling correction signal can be applied to the input where the feedback is normally applied.