Battery Over-Discharge Protection Circuit

[scwhiteley]

Greetings,

Anybody have any suggestions for a battery over-discharge protection circuit?

I have been using home built NiMH battery packs in some of my projects. (for instance my most recent uses 10 C cells). However, after doing some research, I've learned that these packs (also LiPO) packs, can run into trouble if they become over discharged.

I think I'd like to learn how to incorporate a circuit design that would not allow itself to operate if the terminal voltage of the battery dropped below a certain point (for instance 10V for the 10 cell NiMH pack.)

I've done some searching around and have come across a few designs, just curious if you folks had some insight in the area.

My most recent project did incorporate a six LED battery meter using an LM3914 chip which I calibrated such that the last LED is lit when the battery is at 10V, so I know not to operate the gizmo beyond that point, but I'd like to develop an actual under-voltage lockout.

Thanks for any suggestions!

 

[sofaspud]

The ones I usually encounter seem overly complex (I'm sure the designer has his reasons) but I don't know why a battery lockout couldn't be built around a low-power comparator and depletion-mode MOSFET.

 

[scwhiteley]

I'm definitely more interested in simplicity and functionality over absolute accuracy. For instance, if it cuts out power anywhere from say 10.0 to 10.5V, I should think that would be fine.

Someone on a different forum also suggested using a zener operated MOSFET.

I'm not new to electronics, but I'm certainly no expert. This definitely looks like a good avenue of research. I'll be looking into this "low-power comparator" and "depletion mode MOSFET" you speak of.

Thanks

 

[Andrew Eckhardt]

A TL431 and a big regular P channel FET would be pretty easy to cob together too.

 

[scwhiteley]

So the TL431 would be set to output my desired cutoff voltage, say 10.0V to the MOSFET (allowing current for the rest of the circuitry). Then when the battery pack dipped too low below the regulator output voltage, it would stop conducting and shut off the MOSFET (and everything else with it).

Am I understanding your approach Andrew Eckhardt?

 

[Andrew Eckhardt]

Pretty much. The 431 has an internal 2.5V reference so tune a divider to hand that to the reference pin from whatever trip point voltage you want. Tie the source pin of the P channel enhancement FET to B+. May as well be a fairly large transistor to minimize loss. You're not looking to regulate or do anything very dynamic so bias isn't too critical. Maybe a 10K resistor from gate to source, TL431 cathode connected to the gate, anode to ground. FET drain to load. You might want to add a 15V zener clamp to protect the FET gate. If the supply voltage can go higher than that you'll need to be sure the TL431 doesn't try to drive big current into the clamp. 1k series resistance would be fine. See the TL431 datasheet. Figure 24 in the TI sheet shows a bipolar based shunt regulator, where if you swapped in a PFET and instead of grounding the drain used it to feed the load, you'd have the general idea.

If you are concerned about power consumption you can increase the bias resistor and use quite high resistances for the divider network, but I'm not sure what the limits would be without looking at it more closely.

 

[Andrew Eckhardt]

Something like this:


SUM110P06-07L-E3 Vishay Siliconix | SUM110P06-07L-E3CT-ND | DigiKey

 

[davidsrsb]

NiMH are not spoiled by deep discharge. Any Lithium type most definitely is.
If you have 10 NiMH in a stack, you do need to prevent reverse charging when some cells discharge before the others. A reverse biased Schottky diode across each cell will do this.

 

[scwhiteley]

Interesting.

I've never had any problems with NiMH packs myself, but after reading some horror stories on the internet (batteries exploding, etc) I thought that maybe I had just been lucky.

There seemed to be a lot of consensus that (at least with the NiMH packs) that what happened was exactly as you describe, davidsrsb, that the pack had become discharged to the point that one (or more) weaker cells had become over-discharged and then became "reverse-charged" and thus permanently damaged . Although I don't quite understand the mechanics behind this condition, it seems that after the "reverse-charge" event, some packs would last between one or a few charges before they became overheated, began venting, and in some cases exploded...

(Please correct me if I'm wrong, or at least feel free to clarify if you understand the circumstance better than myself.)

Davidsrsb, can you clarify exactly what the reverse bias schottkys do to prevent this from happening? (I've never used schottkys before, I do have an idea of their makeup, but am not familiar with their application.) In addition to that, can you give some insight as to how the battery pack will behave when it reaches the discharge point at which one or more cells begin to "reverse-charge"? (In other words, does it just somehow cut out at a safe voltage level once one cell reverses?)

I like the schottky approach because of it's simplicity and absolute lack of a PCB footprint, but I need to understand it a little better.

-Thanks

 

[scwhiteley]

So, still examining options...

Most suggestions return to the MOSFET design. Now as for what is going to open and close the MOSFET, I recognize three good options:

1. A zener diode with appropriate voltage (~10.0V in my case, probably the simplest application)
2. A comparator (Haven't quite worked out the specifics of this yet, but I don't think I'm far off.)
3. A regulator (TL431 for instance, still working out this one as well.)

Do any of these jump out at you guys as a better option than the others. (Andrew, you suggested the 431, any thoughts on why or why not it would pull this off better than the others, i.e. power consumption, accuracy.)

-Thanks again

 

[davidsrsb]

If you have a power Schottky across each cell, as soon as the cell has discharged to zero and current is still drawn, the reverse voltage will be clamped at about 0.2V. This is probably enough to prevent any electro-chemistry taking place.

This site has a lot of good information Basic to Advanced Battery Information from Battery University

 

[elboa8]

CutOff

Greetings,

Anybody have any suggestions for a battery over-discharge protection circuit?

I have been using home built NiMH battery packs in some of my projects. (for instance my most recent uses 10 C cells). However, after doing some research, I've learned that these packs (also LiPO) packs, can run into trouble if they become over discharged.

I think I'd like to learn how to incorporate a circuit design that would not allow itself to operate if the terminal voltage of the battery dropped below a certain point (for instance 10V for the 10 cell NiMH pack.)

I've done some searching around and have come across a few designs, just curious if you folks had some insight in the area.

My most recent project did incorporate a six LED battery meter using an LM3914 chip which I calibrated such that the last LED is lit when the battery is at 10V, so I know not to operate the gizmo beyond that point, but I'd like to develop an actual under-voltage lockout.

Thanks for any suggestions!

This may help. It's been in use for about 3 months.My design.

 

[elboa8]

UnderVoltage cut off

Opps the pic got lost somewhere.

 

[AndrewT]

If you have a power Schottky across each cell, as soon as the cell has discharged to zero and current is still drawn, the reverse voltage will be clamped at about 0.2V. This is probably enough to prevent any electro-chemistry taking place.

This site has a lot of good information Basic to Advanced Battery Information from Battery University

This the same protection that should be incorporated into every NiCad battery pack.
But rarely is !!!

 

[scwhiteley]

Perhaps I should protect each cell with one of these diodes from digikey:

LX2400ILG Microsemi Analog Mixed Signal Group | LX2400ILG-ND | DigiKey

It appears to be a bypass diode for solar applications, the voltage drop is only 65 mV! And they only cost $14 a piece! Significantly more than the cost of each cell!... Just kidding. I think I will protect the pack with some cheap-o schottkys though.

I also intend to implement the under-voltage cutoff with the MOSFET approach... haven't 100% decided on the trigger yet. Going to do a little more research and hopefully get an order in to Digikey early this week so I can start testing.

 

[scwhiteley]

Pretty much. The 431 has an internal 2.5V reference so tune a divider to hand that to the reference pin from whatever trip point voltage you want. Tie the source pin of the P channel enhancement FET to B+. May as well be a fairly large transistor to minimize loss. You're not looking to regulate or do anything very dynamic so bias isn't too critical. Maybe a 10K resistor from gate to source, TL431 cathode connected to the gate, anode to ground. FET drain to load. You might want to add a 15V zener clamp to protect the FET gate. If the supply voltage can go higher than that you'll need to be sure the TL431 doesn't try to drive big current into the clamp. 1k series resistance would be fine. See the TL431 datasheet. Figure 24 in the TI sheet shows a bipolar based shunt regulator, where if you swapped in a PFET and instead of grounding the drain used it to feed the load, you'd have the general idea.

If you are concerned about power consumption you can increase the bias resistor and use quite high resistances for the divider network, but I'm not sure what the limits would be without looking at it more closely.

Still piecing this one together Andrew. Just out of curiosity, why did you choose a PFET for this application? Does the TL431 deliver negative voltage to the PFET gate?

 

[Andrew Eckhardt]

I was initially thinking of a minimalist arrangement that the shunt regulator and PMOS would satisfy, but it turns out the IC doesn't have enough voltage gain to drive the FET directly, and by the time you satisfy all the other requirements it might be more complicated and not work quite as well as an opamp/ comparator arrangement.

 

[paulb]

Check out Fig. 64 & 65 in
http://www.ti.com/lit/ds/symlink/lm10.pdf
Drive a FET instead of an LED? Low power.

 

[scwhiteley]

I think I was misunderstanding the use of the PMOS. I thought it needed a negative voltage on the gate. But now that I look into it more, it appears that the voltage just needs to be "more negative" than the source voltage?

Am I understanding this correctly?

It seems to me that I could probably use either a P or N channel MOSFET for my application. However, I have lots of parts and inputs and whatnot that connect to ground, so it seems the design might be a little less complex if I can maintain a common ground on the PCB and in the total design itself (i.e. the enclosure). To keep the ground common across all components, it seems that putting the MOSFET shut-off on the high-side is preferable, which means going with a P-channel MOSFET.

I've looked at a few datasheets for these on digikey. Interestingly, one datasheet gave the Vgs as a negative value (around -3 V I think). However the datasheet for the MOSFET I've ordered to test with:

http://www.onsemi.com/pub_link/Collateral/MTP2P50E-D.PDF

Indicates a positive Vgs value, (about 3 V).

Am I correct that the Vgs of the P MOSFET needs to be negative in reference to Source? i.e., the voltage in my setup would be something like 12V to source, and 9 V (12-3) to the gate for ON operation?

 

[Jsixis]

digital relay 10 volt