Audio-Next : True 768Khz 32 bits of SPDIF/I2S/Dop/DSD/SRC/ASRC !!

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#4
torgeirs said:
Do you know if it supports +0dBFS signals? (intersample peaks over 0dBFS)
http://www.diyaudio.com/forums/digi...amp-crossover-dac-project-40.html#post4476464
I see you have the ASRC before the volume control.

Maybe thre will be inexpensive digital volum and samplerate controls now, for us that is not affraid of digital attunation but want to do it outside the PC.

Regards Torgeir
Click to expand...

input signal range = 0x7fff_ffff ~ 0x8000_0000 (sign)

ASRC = 3-stage FIR filter with 64-bit resolution, 0.5 LSB distortion

volume control = +18dB ~ -110dB step 1/32 dB

output signal range = 0x7fff_ffff ~ 0x8000_0000 (sign)



In this case input=sign 32-bit, FIR=sign 64-bit, volume=sign 32-bit,
distortion=0.5 LSB,

and we can get 31.5 bits accuracy.



: I think Ur question is interpolation filter & re-sample issue.


as I know, answer is yes. This chip, CT7302PL, can maintain +0dBFS.
 
#5
kfshu2 said:
input signal range = 0x7fff_ffff ~ 0x8000_0000 (sign)

output signal range = 0x7fff_ffff ~ 0x8000_0000 (sign)



: I think Ur question is interpolation filter & re-sample issue.


as I know, answer is yes. This chip, CT7302PL, can maintain +0dBFS.
Click to expand...

I dont understand how it can handle intersample overload without having higher output signal range than input signal range. My bet is 4 bit resolution and noise at -20dBfs
 
#6
As stated the problem is that a signal with intersample overloads should be attunated the same amount as the intersample overload max.
Normaly -6dB would do the trick.
I guess two chips in series would solve it:
The first has no SRC been done only -6dB attunation -> Transfer samples at 32 bit -> The second has SCR or ASRC and then digital volum control.
After digital volum control there should be no need for signals at more then -6dBFS with a high quality DAC and propper analog gain before the amps.
If it is a digital amp fed intersample overloaded signals it will clipp them.

Regards Torgeir
 
#7
torgeirs said:
I dont understand how it can handle intersample overload without having higher output signal range than input signal range. My bet is 4 bit resolution and noise at -20dBfs
Click to expand...


for example :

sample rate = 48khz, single tone

if : input signal = 12khz sin tone, 2pi/4 offset

=>0dB max = 0x7fff_ffff



if : input signal = 12khz sin tone, 2pi/8 offset

=>0dB max = 0x7fff_ffff * sin(2pi/8)



: u may think about frequency domain, not time domain.

not all 0dB max value = numeric max value
 
#9
BTW, I really like your product if it lives up to the spec!

And to the non believers in digital volum control bacause of noise
Point 1:
Vn=√(4*Kb*T*R* Δf) (V)
Thermal noise of resistor - Calculator - Audio PerfectionAudio Perfection
Dynamic range re 3V RMS = 144.4 dB for 100ohm
Dynamic range re 3V RMS = 134.4 dB for 1000ohm
Dynamic range re 3V RMS = 124.4 dB for 10k
Dynamic range re 3V RMS = 117.6 dB for 47k

Point 2:
DAC from PCM1798 | Audio DAC | Audio Converters | Online datasheet
Distortion from -10 to 0 dBFS is almost the same relativ to signal.
graph_17_sles102.gif


So source impedance or analog feedback resistors in buffers and analog volum control must be pretty low to gain any advantage from analog volume control.
A firm like RME has abandoned it.
 
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#12
torgeirs said:
BTW, I really like your product if it lives up to the spec!

And to the non believers in digital volum control bacause of noise
Point 1:
Vn=√(4*Kb*T*R* Δf) (V)
Thermal noise of resistor - Calculator - Audio PerfectionAudio Perfection
Dynamic range re 3V RMS = 144.4 dB for 100ohm
Dynamic range re 3V RMS = 134.4 dB for 1000ohm
Dynamic range re 3V RMS = 124.4 dB for 10k
Dynamic range re 3V RMS = 117.6 dB for 47k

Point 2:
DAC from PCM1798 | Audio DAC | Audio Converters | Online datasheet
Distortion from -10 to 0 dBFS is almost the same relativ to signal.
graph_17_sles102.gif


So source impedance or analog feedback resistors in buffers and analog volum control must be pretty low to gain any advantage from analog volume control.
A firm like RME has abandoned it.
Click to expand...


yes,
so we always implement R with SC(switch-cap) in VLSI design, not poly-resistor.
 
#19
HpW said:
Fine.. do you have a evaluation board or to show us how you test those speeds. 😀

Hp
Click to expand...

if u need product support.

ComTrue Inc. - Contact


S/PDIF :

source0 = (CD player with spdif output) / (AP2722 32k~192k 16~24bit)

DUT0 = EV-board (spdif in from source 0) (SRC 32k~768k 24/32 bit) (spdif RCA/optical out to DUT1)

DUT1 = EV-board (spdif in from DUT0) (SRC 384k 24/32 bit) (TI pcm5102 DAC out)

speaker = from DUT1 DAC out

AP2722 : from DUT1 spdif out (32k~192k 24bit)


I2S/DSD/Dop :

same as S/PDIF test. just change DUT0/1 I/O port to I2S/DSD or Dop(spdif/i2s)
 
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#20
audio next : digital speaker (spdif in / direct spdif out)


optical : 384k/24 50M bit-rate. distance: i think more than 100m .
(jsr2124, jst2124 : solteamopto)



coaxial : 768k/32 125M bit-rate. distance : we only try 50m, but i think, may
more than 100m .
(RAC connector, 5c2v coaxial cable, 75ohm)
 
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