I have to try your's when having more time, but I'm a little intimitaded by the conceptual complexity (for I).
Developing a properly working USB-to-SPI controller for asynchronous USB Audio Class 2 should be much easier task than converting I2S to SPI. Just use a proper MCU instead of FT4222.
Something missing from this discussion on digital to analogue audio conversion, is how the audio became digital in the first place.
Surely the merits of an R2R DAC are lost without the complementary R2R ADC?
Surely the merits of an R2R DAC are lost without the complementary R2R ADC?
Not of course, but depend of a required bandwidth (i.e.- main PWM frequency).
You can do a simple calculation - what should be the frequency resolution (master clock frequency) depending on the number of bits and the main PWM frequency (Fpwm), it's a simple multiplication.
10 bit is 1024, for Fpwm=100kHz you need the clock just 102.4MHz, but 16 bit is 65535....
Alex.
Yes... As in most cases of earlier m=non audio DAC chips.
Someone should make the input format standard fo these dacs more clear, and then maybe we have chance to adopt I2S or other standard digital format to these dacs?
.
Could You maybe give a help on that?
Cheers 🙂
A little more complicated than connecting an AD1862 (or similar) to I2S, but not the "rocket science".
Another question - does this make sense?
DAC82002 may be, it is two channels and not critically expensive. But only 16 bits.
DAC11001B - 20 bits, but the price is completely different, and you need at least two of them.
Alex.
You miss my point. Connecting to SPI is a doddle but it is not about that. It is about sticking a relatively crude I2S interface on a precision industrial dac used in the vastly greater area of electronics that isn't audio. No one is going to do that.
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Nice job, look like DAC11001B do a fine job in Yggdrasil MIB.....
https://www.schiit.com/public/upload/PDF/MIB more better.png
No, no, I'm exactly about I2S->SPI for DAC82002 or DAC11001B.
To do or not to do is another question, but DAC8803 and DAC8814 I did few years ago.
Alex.
I understand more now. Indeed going with higher clock speed it a mess clock side and pcb layout wise ! It already asks great cares with only 100 Mhz XOs so I suspect to be hard design task !
The same chip is also used for the More is Less (MIL) boards.
"The DAC11001B is typically not used for audio, but Schiit is experienced at using its custom DSP-based digital filter to interface with ICs usually used in medical and defense applications. The implementation in Yggdrasil+ uses 4 DAC11001Bs, one for each phase, in a hardware-balanced, differential application."
https://github.com/iitzex/dac82002x4
With FPGA, it is really easy to convert i2s to spi,
all R2R dac for industrial will be available for audio.
But the code did not implement dithering, maybe someday.
With FPGA, it is really easy to convert i2s to spi,
all R2R dac for industrial will be available for audio.
But the code did not implement dithering, maybe someday.
If the main function is "to convert i2s to spi", for what you need dithering?
Volume control?
Alex.
Nowday i2s usually use 24bit data,
and dac82002 only use 16bit, dac11001b up to 20bit.
Truncating bits is working good for me,
but maybe dithering will be better, not sure, thx.
MIL - featured the DAC11001A
MIB - features the DAC11001B, which has improved THD due to improved glitch filtering.
https://www.head-fi.org/threads/sch...lds-most-improbable-start-up.701900/page-8646