Aleph Ono/ Xono

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Yes... I identified them correctly... And I connected them exactly the wrong way :headbash: :ashamed:

ECB or BCE... Top or bottom view... they just look so much like each other!! I will have one of my housemates slap me for making this stupid mistake.. ;)

I corrected the error... And the differential stage is working fine now... The amp hower defies all attempts to work :bawling:.... Measurments will follow.

Thanx for the hint Peter :)

Bouke
 
Doubt

Bakmeel said:
I never doubted that the Pass schematic had errors...

Doubt is the opposite of believe, or in digi-talk, "believe bar." So it's kind of a negation of believe. Of course, never is a negation too, "not ever." So due to the double-negative, you're saying that you always believed that the Pass schematic had errors. Obviously not your intent.

I have done lots of business with non-native English speakers, and I know that this "doubt" thing often causes trouble. At least in my business in Mexico and Poland it's usually gotten wrong. So I thought I would just make my comment here. Hope you don't mind. Just fun, and helpful, hopefully.

I wish I could speak any language as well as you guys speak English. I can just barely rent a car in Germany. 25 years since I studied :) My dictionary shelf: French, German, Spanish, Polish, Chinese.
 
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systematic offset

I wanted to add my vote of confidence in your work, Bouke. Debugging is tough. Don't worry about it; eventually the problems will be solved.

I assume that the 2 mA drawn by Q16 should be divided equally over the differential stage but it's not

For the differential pair to divide the current equally, the Vgs required on the second gain stage PMOS Q3 must exactly be equal to the load resistor R4 of the differential pair times half the tail current of the differential pair. I don't think it is likely that you have this condition naturally unless Q3 is selected very carefully or R4 is adjusted. And even then it will be rather temperature dependent.

Now I know some folks dislike current mirror loading, but it does solve this problem, at least.

I wonder how much the linearity of the differential stage is degraded by this systematic offset... Surely it eats into the linear range of the diff. pair.
 
Evil Q3

Mirlo,

I agree that could be the last thing I need.

I replaced R4 with a potentiometer for easy adjustment... it doesn't really make a difference.. As soon as Q3 reaches saturation, the voltage at the Drain shoots up to 28V :(

What are the voltages at the gates from Q7 and Q18 supposed to be? I calculated them to be + and - 4V.. but it doesn't really gets there :(

Bouke
 
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Joined 2002
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I think the voltages you guess for the gates of the output FETs are about right. What do you actually get?

I have a few ideas that might help debug:

1) Make sure the feedback network conducts DC. If one of the feedback resistors R7/R8/R9 is open circuit, or one of the caps C1/C41/C2 is shorted, you might have the problems you describe.

2) Disconnect Q7/Q18 gates (tie to ground to make sure output stage is off), add 2 series resistor in parallel with the bias pot so you can take the feedback R9/C6/C5 from where the two resistors tie together. This way you can test the differential FET stage Q5 and the second stage without trouble from the output stage.

3) Disconnect R12 from R4/Q5 and connect it to a pot that allows you to adjust Vgs open-loop. See if you can center the output and adjust the bias current. This is probably impossible becasue the stage has too much gain. Maybe there is a way to use an IC op-amp to substitute for the differential FET for this test. I'll expand on this idea later.

These might NOT be good ideas for debug, they are just the first things that came to my mind. So think about them first, maybe if nothing else they will spur your imagination.

My suspicion is that there is a simple short or open somewhere, and that everything is otherwise sound.

By the way, were you able to find 10 pF film capacitors in Europe? I am having a hard time finding them that small here in the US, so I may have to resort to using a Mica cap for C11.

As for my earlier comment about systematic offset, it just an observation about the design; I don't think there is likely to be enough systematic offset to create the problems you are seeing. But it does appear natural that each Aleph Ono would be expected to have a slightly slightly different DC balance point depending on the Vgs required to get about 7 mA in Q3.

-- mirlo
 
Bouke,

Thanks for the layout you sent. As already mentioned, reverse Drain and Source of Q3 (your T7) – Emitter of Q6 (your T6) should be connected to the Drain of Q3. The voltage on Drain of Q3 should be about 21V. The voltage on Collector of Q6 is about 4V. Let me know if you need further measurements.

Jens
 
Limping and Dragging

Yes... I should have kept the news coming... If only there was any... :S

The thing is: I'm stuck. I did all I could to make the thing work, but I as soon as I get stage 1 working, it blows out again if I connect stage two. For some reason, the feedback loop can't cope with the DC offset, and it clips to either positive, or negative rails.

Then IF i were to get this thing working, I already know there are also some errors in the Inverter cirquit, AND the MC stage. :bawling:

So, I have decided to abandon this prototype, return to the drawing board, and redesign the Main board. Jens and Mirlo have helped me checking the drawings, (thanx for all that guys :hug: ). I now also know the limitations from the supplier, so I can overcome the trouble I got because of the lack of space between the pads and the ground plane.

I think it will be in the next year when the second prototype is finished. I have two weeks off with christmas, so I can afford again to invest some time in the project.

The good news is that the PSU works beyond expectations! :) During testing, it got a few blows (short cirquits), but it behaved perfectly. All it needs is a bit finetuning for component fitting and optional cooling for the FETs.

If anyone has requests for component shapes, please let me know. everybody uses different caps, and every type of cap comes with a different footprint so let me know before I put out the final design.

I am very sorry for the immense delay and the great radio silence for the last month...

Bouke
 
Keep up the great work! You have done a good job. Don't take that we are pushing behind you. But rather we are all spiritually behind you to make it working.
We all know the most challenging DIY lies in phono part. That's why I always respect the phono equipment. In many occasions, they are so out of proportion in price when they compare to power amps. I guess it's psychologically common that people like to get as much weight as possible when they pay the money.
Anyway, enjoy the X'mas and I wish you a success before 2003 arrives :D
YCLee
 
Bouke,

Stick with it!!! You are doing a GREAT job!

My guess is also that there is an open or short somewhere... This is assuming all of the component leads are oriented correctly. It might be worth double checking them again as well as each of the diodes...

Anyway, just wanted to drop a quick note to let you know not to give up... We are all here right beside you following along...

Good Luck and Happy Holidays,
 
Bouke,

Having thought about this a bit more...

You posted that you have stage 1 working correctly and it blows every time you connect stage 2...

Ok, I would look for shorts to ground in stage 2. If not, then perhaps a component that's turned around with respect to conducting to ground. The current is going somewhere...

Just a few thoughts,
 
Is anything happening with the group purchase of boards for the Ono? I have not seen any further posts to this thread for nearly a week! Could it be due to the holiday season? ;)
Also, how about some more input from those that have successfully built an Ono clone? More details on what cartridges are working well, etc., would be welcome. There MUST be more analogue fans on this board!!

Andrew
 
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