I'm trying to use the line level inputs of the WM8731 and the "Absolute Maximum Ratings" below was confusing to me:
As can be seen, the datasheet says the absolute minimum for analog inputs are AGND(0) - 0.3V = -0.3V whereas a line level input could swing to -1V. I also see a lot of projects just using the line inputs on this chip disregarding -0.3V. I see on the datasheet and it definitely works. So the logical conclusion is that I'm missing some obvious knowledge. Could anybody explain?
Best
As can be seen, the datasheet says the absolute minimum for analog inputs are AGND(0) - 0.3V = -0.3V whereas a line level input could swing to -1V. I also see a lot of projects just using the line inputs on this chip disregarding -0.3V. I see on the datasheet and it definitely works. So the logical conclusion is that I'm missing some obvious knowledge. Could anybody explain?
Best
These are the max rabges to avoid damaging the chip. They are different from the normal operating levels.
Basically it says you can't go more than 0.3V outside of the supplies.
So your analog inputs should stay within the supply range to work without breaking anything.
Jan
Basically it says you can't go more than 0.3V outside of the supplies.
So your analog inputs should stay within the supply range to work without breaking anything.
Jan
Hi Jan,
That I understand but considering that my AVDD is 3.3V and AGND = 0V, doesn't that mean the voltage range is -0.3V to +3.6V? Which is not ideal for line level -1V to +1V.
That I understand but considering that my AVDD is 3.3V and AGND = 0V, doesn't that mean the voltage range is -0.3V to +3.6V? Which is not ideal for line level -1V to +1V.
You are supposed to AC couple the input signal. The internal circuit of the ADC then biases the input pin to a copy of Vmid, so the momentary voltage will swing +/- 1.4 V around Vmid when the peak signal voltage is 1.4 V.
Not sure I get it, do you mean the datasheet is talking about the internal ADC input max ratings instead of the line pins of the chip?
When you apply +/- 1.4 V to one side of the capacitor and connect the other side to the IC input pin, the IC ensures the DC voltage at its input pin becomes approximately 1.65 V. The momentary voltage at the IC pin then swings from 0.25 V to 3.05 V, which is well within the -0.3 V to 3.6 V rating. See the suggested application circuits in the datasheet.
Actually, the voltage can temporarily go negative at start up, when there is already signal at the input while the capacitor is not yet charged. ICs are usually designed to handle that as long as the current is not too large (preferably < 10 mA, definitely < 100 mA).
Actually, the voltage can temporarily go negative at start up, when there is already signal at the input while the capacitor is not yet charged. ICs are usually designed to handle that as long as the current is not too large (preferably < 10 mA, definitely < 100 mA).
OK so the chip biases the input and the max rating is meant for after the bias voltage is applied. I find it confusing though still I would expect to see -1.5V min +1.5V max on the table.
Thanks
Thanks
-1.5V on any pin will destroy the chip, so they don't clearly can't put that in the absolute maximum ratings as it would be a lie. Absolute minimum/maximum voltage on a pin is exactly that, as this is a datasheet for the chip, not for a whole circuit/module using the chip.
Experience teaches you that this is a single-supply device (some devices generate a negative rail internally, but that would be obvious as there would be a pin for that rail to allow decoupling capacitor(s) on it). The Vmid pin is a giveaway that this devices is single supply.
Experience teaches you that this is a single-supply device (some devices generate a negative rail internally, but that would be obvious as there would be a pin for that rail to allow decoupling capacitor(s) on it). The Vmid pin is a giveaway that this devices is single supply.
Very sorry to ask again. Just trying to wrap my head around it. So these pins are AC coupled, meaning that the voltage on these pins will swing around 0V (ground) as the capacitors will get rid of any DC bias, how is that not below the min rating of these pins (which are at max -0.3V). I do understand that the chip has an internal bias at Vcc/2 but it's not on the "pins" it's after, an internal stage no?
The voltage at pins 13/14 when the chip is in operation will be around 1.6V with no input, which will be ADC zero. Be sure if you use polarized caps to ensure the positive pin on the cap is connected to the chip. Hope that helps.
Ah I was wondering why the positive side was on the chip side. That brings another question, my input stage has an opamp running on the same supply and biased also to Vcc/2. In this case which way the cap positive end would need to go?
Interestingly, if your input stage outputs a DC of half supply with the AC superimposed on it, you don't need a coupling cap!
Just keep the AC amplitude below the max input range of the chip.
Jan
Just keep the AC amplitude below the max input range of the chip.
Jan