A Note On The Binary to Thermometer Code Decoder

The advantage of segmenting a DAC is well known - not only to increase the accuracy but also to greatly improve the glitch behavior. The idea here is to build a segmented binary to thermometer code decoder using diode ROM's. To motivate the problem, consider a DAC with 3-bits segmented. (Now, only the DAC is segmented. Not the thermometer decoder yet). For this case we need a n-3 bit binary coded DAC and 2^3 - 1 = 7 additional segment resistors. These 7 resistors must be fed with a unary code, which can be generated using the decoder below. 3 MSB bits go into a active-low 3-to-8 decoder (not shown) on the left hand side. Its outputs are fed into the diode ROM. Three specific input-output examples are given in respective colors.

3 bit.png


This ROM uses 28 diodes. Note that everything here (the number of diodes, current sank by the active low pin...) increases wildly with the number of the bits. For example:

2 bits (3 outputs) decoder needs 6 diodes
3 bits (7 outputs) decoder needs 28 diodes
4 bits (15 outputs) decoder needs 120 diodes
5 bits (31 outputs) decoder needs 496 diodes
6 bits (63 outputs) decoder needs 2016 diodes

and so many * currents! So, the WHOLE MESS grows way faster than the number of outputs needed (something like 2^n times faster). AFAIK inside chips this problem is handled using row-column decoders with some separate logic to control every single matrix element... Boy, this is not for DIY, not for me. So, I wanted to see what I can cook with n = 2 units below (with 4 outputs) and regular ROM with 3 outputs, similar to the one given above. The reason for adding the unit with 4 outputs will become clear soon.

2 bit.png
 
Here is a 4 bit binary inputs (A0, A1, A2, A3) to 15 output thermometer code decoder made by 2 bit units. All the 2x4 decoders are active low and enabled low. All the outputs are on the vertical section in the middle: 3 * 4 + 3 = 15 outputs. To reduce the pain in following the logic, I have incorporated a particular input state A0, A1, A2, A3 = 1001 ( = 9 in decimal), as an example. Note that we got 9 1's at the output. You may also verify that 0000 at the input gives all 0's at the output and and 1111 gives 15 1's.

4 bit.png
 
As you see above, the complexity of the circuit increases more or less linearly with the number of the outputs and expansion to higher bits is kind of trivial. This can be further demonstrated with a 6 bit (63 outputs) example below. Here, every square and rectangle represent a 2x4 decoder and triangles are the same 2 bit diode ROM's above. Red numbers this time crudely represent that the third block from the bottom is enabled and the rest is nested inside smaller segments. I apologize because this is a highly simplified sketch omitting all the buffers and whatnot but if you have studied the 4 bit case in the previous post, you will get the idea.

6 bit.png


And if you are sufficiently crazy, here is your 8 bit decoder. This time there is one 4x16 decoder (1 out of 16) on the LHS.

8 bit.png
 
And here are some practical considerations. I think the outputs of the 4 bit decoder would settle within a microsecond or so and higher bit ones could take a few mu.s (And they could jump up and down a few times until they finally settle). This should be sufficiently fast for about 22 mu.s word period of 44.1 kHz audio. On the other hand, rise and fall times due to the presence of the diodes and code-dependent jumps would likely call some buffers (inside the decoder and all outputs) with Schmitt triggers (HOW DO YOU THINK??). Now, these Schmitt trigger inputs have quite some low switching points like V_T(-) = 0.9 V. Long story short, low output voltages of the decoder must be quite low. This suggests the use of

1) Low forward voltage Schottky diodes.
2) Largish resistors in the ROM's. 20k is the value I have in my mind.

Large resistors not only decrease the forward voltage drop on the diodes but also reduce the V_OL build up at the sink of the 2x4 decoders, both of which add up to final low output voltage of the decoder.

This is how much steam I got for today. All comments are welcome.

Cheers.
 
What about the element matching problem, power supply regulation, timing jitter, etc.? Just thinking, some high end dacs are going with DSD rather than PCM. There are already people building pretty good discrete resistor dacs of both kinds. Why start again here?
 
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I think timing is not relevant here. These outputs are supposed to be latched and fired simultaneously in a later stage. Here I am not describing a complete DAC at all. It is not the purpose of the current post. I am not sure if I understand the comment about "pretty good discrete resistor dacs". On the PCM side, are you talking about R2R? Segmenting is the key to improve R2R's performance grossly (including the element matching problem). I have never seen a segmented discrete resistive DAC so far presumably because of the the challenges associated with obtaining the thermometer code as I tried to explain in post #1 above. Otherwise, please show me some examples of the unary segmented R2R's. I would love to see them.
 
Because I have started this, let me add an alternative idea below. The AND gates you see in the figures compare the output of the decoders and the output of the previous gate to make up their mind.

Note that the AND gates work like a "zipper" to follow the active output of the decoder to produce the thermometer code (see the 3-bit decoder first). Hence, 4-bit and 6-bit cases could also be made as simple as the 3-bit case, without the segmented structures I have introduced for the higher-bit decoders. But this would take way too many "zipps" depending on the code change. With this segmented structure, even the 6-bit decoder is expected to settle within about a microsecond.

Off the main topic: Surely the outputs of these decoders (together with the binary part) should be latched and fired simultaneously with some PIPO devices such as 74HC574 or the better AC version. The resulting unary segmented DAC can also be incorporated in a future Sign Magnitude design.

3 4.png


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