A good way to reduce R-2R DAC linear error

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Bernhard said:


I did that because obviously you do not want to understand.
And because I did not want to calcuate with numbers like 2,28882054 which is the step of PCM1702.

And it is no unreal deviation in my example because if the 1704 has 17 bit linearity, if you are happy to find one, that does mean all bits from bit 18 to bit 24 are totally unsure and the relative deviations compared tp my fictive example would be much worse.

And why don`t you do your calculation yourself ?

If one LSB should be fictive 1 nA and 7 bits are unsure, the next step could be 100 nA :dead:

It is clear that the deviation can be much worse than in my example.

I fully understand what you are doing. I just happen to think it is pointless. You have a half-baked solution in search of a problem and to that end you have convinced yourself that enormous errors exist in the available dacs, so much so that they sound more like random number generators than dacs, and you choose to dismiss anything that does not fit. Where are the numbers to back up your claim or to show deviation from the ideal. All I see so far are ifs, buts and maybes.
Keep tilting at those windmills, Quixote.
 
rfbrw said:


you have convinced yourself that enormous errors exist in the available dacs, so much so that they sound more like random number generators than dacs,

Who speaks about enormous errors ?
This forum is about trying to get the best results.
This is what I do.

But you are right, I should forget about that and do more important things.

Like the thing that I am working on sometimes.

A multibit direct voltage out DAC that drives a speaker with high voltage and does not have an I/V stage.

First two bits are up and running.

No joke, no fake, no cheesecake.

I have learned from this thread what happens if one posts some idea...

And the other thing is far more complicated than selecting 1 out of 256.

Don`t ask...
 
I am actually very impressed with the idea of making a LUT table mapping PCM values to actual outputs. Such a table could correct for DAC problems as well as the character of the I/V, filter, buffer, etc. It would be essentially a global feedback system for d-to-a conversion, similar to the lookup tables used to calibrate video displays.

But I wonder how you are planning to measure this practically. If it was easy to measure down to 24 bits, everyone would do it.
 
Problem with the idea is that it doesn't make sense in any real application. Well almost none. The thought experiment is essentially assuming that the 24 bit (or whatever the better DAC is) is also a ladder implementation. (From the thread title - R-2R). Problem with trying to create a 16 bit DAC from any real 24 bit DAC is that there is no such thing as a 24 bit latter DAC. Indeed the vast majority seem to now be built from a hybrid sigma delta topology. With typically 5 bits worth of ladder inside the loop.

The proposed idea of measuring the output, and looking for the perfect value that sits at each quantisation level for a 16 bit DAC only works for a static (i.e. DC) situation. The methodology forgets the presence of a FIR filter, that forms an intrinsic component of the DAC. Thus for any dynamic situation the pre-distortion of the input values would be at best meaningless, and most likely, injurious to the sound.

The quoted spec sheet is being very honest about the linearity spec, and how it can be measured. The critisim of the sheet relys upon the assumption that the linearity they are not actually specifying is static. It isn't. The distortion products that occur are going to be mostly dynamic, and mostly due to timing - jitter if you must. From one occurence of one particular 16 bit input value, to another, the DAC will almost certainly create a different output - because of the dynamic context in which it appears. A lookup table could never capture that.

You could imagine a system where you had a true non-oversampled 16 bit ladder DAC, and then used a look-up table that fed another DAC of some lower resolution that had just enough range to linearise the main DAC, where a custom look-up table was created. A small step to a hybrid where the main DAC was less than 16 bits, and the second DAC took over some of the low order bits totally. Reduces the size of the look-up table. All a matter of the right engineering balance. I somehow doubt this idea is new. But a lot of trouble to fix a problem that is better addressed elsewhere.
 
What Francis said above was also nagging me: the fact that the error-to-be-corrected is dynamic. If the 16 bit DAC can give different output for the same input depending on the dynamics of the moment, the look-up fails. For me this is the crucial point, if that cannot be solved (and I think it cannot) then we might as well forget the whole scheme.

Jan Didden
 
Anyway my favorite is 1 chip per bit.

This can be done dynamic al ? ly ? 😀 in real time 😀 using a spectrum analyzer 😀 and an encoder to adjust the codes that feed each DAC chip.

This will be a discrete DAC using DACs as digitally fine adjustable current sources.
 
Bernhard said:
Anyway my favorite is 1 chip per bit.

This can be done dynamic al ? ly ? 😀 in real time 😀 using a spectrum analyzer 😀 and an encoder to adjust the codes that feed each DAC chip.

This will be a discrete DAC using DACs as digitally fine adjustable current sources.


Well, I can't say you're shortsighted! But Bernhard, you'd need a spectrum analyzer that's BETTER than that DAC. That Spectrum Analyzer probably has a very good internal DAC. Maybe use that one and forget about the other one?😉

Jan Didden
 
rfbrw said:


The current that represents the A in D to A converter.

Do you mean the output current of the DAC ?
Which DAC ? 1 out of 256 or 1 chip per bit ?

If your posts were longer than 1 sentence, that would make things much easier.

I will measure Voltage after I/V as long as there is an I/V 😀
 
janneman said:

you'd need a spectrum analyzer that's BETTER than that DAC. That Spectrum Analyzer probably has a very good internal DAC. Maybe use that one and forget about the other one?😉


Jan 😉

I do not know what is inside your spectrum analyzer.
But inside the one I use, there is a big black thing on that is written:

12 bit high speed ADC

And why can I measure a 16 or higher bit DAC with a 12 bit ADC ?

You know which signal I use ?
 
The 12 bit of the analyzer give 75 dB dynamic.
Noise floor of audio DAC is not better than -70 dB when using -60dB signal. So no harmonics below that -70 dB can be seen anyway.
So all one has to do is adjust until all harmonics have disappeared.
 
Bernhard said:
The 12 bit of the analyzer give 75 dB dynamic.
Noise floor of audio DAC is not better than -70 dB when using -60dB signal. So no harmonics below that -70 dB can be seen anyway.
So all one has to do is adjust until all harmonics have disappeared.


Hoooo...!, Wait a minute! Is that all there is? The errors of the DAC translate in harmonics? And is it possible to adjust for min harmonics? I thought you were going to measure each code. That's quite different from dynamically adjusting for min harmonics, which implies a continuous signal, which implies a stream of codes. Sorry Bernhard, I think you lost it now.🙄

Jan Didden
 
janneman said:



Hoooo...!, Wait a minute! Is that all there is? The errors of the DAC translate in harmonics? And is it possible to adjust for min harmonics? I thought you were going to measure each code. That's quite different from dynamically adjusting for min harmonics, which implies a continuous signal, which implies a stream of codes. Sorry Bernhard, I think you lost it now.🙄

Jan Didden


Hoooo...!, you mix up things.

With the 1 chip per bit you can adjust until harmonics have disappeared, which is the target.
No measuring voltages and progamming eproms here.

Something like that has been realized partially in the PCM 58.
3 or 4 bits can be adjusted with pots.

For the other thing, the 1 out of 256, it has to be proven if there is a difference between static and past settling time. That must be tried. Until then, nobody can claim it cannot work.
 
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