A few questions on TAS5630 implementation

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I am referring to the datasheet at www.ti.com/lit/ds/symlink/tas5630.pdf for implementing a TAS5630 based amp. I was wondering whether the amp board can be made generic so that all the combinations ie 1 channel PBTL, 2 channel BTL, 2.1 channel SE/BTL and 4 channel SE can be implemented on the same board and also be be able to run it off a lower supply voltage.

However the following things are not clear to me.

1) In case of Single Ended mode, how is the ground reference derived since its using a single supply?
2) How is the R_COMP calculated for lower voltages than 48 volts?
3) The inductor at output is sometimes 15uH and sometime 7uH. Since its part of the 2nd order LC filter, can C be changed instead of L for a varying load impedance?
4) Where can I find the frequency response of the various circuits in the datasheet?

Thanks in advance
 
1) Just looking at the pinouts, i see there's a VI_CM pin, which is described as "Analog comparator reference node"; also input DC blocking caps are mandatory, regardless of configuration. All this leads me to believe it has an internally-derived bias / reference voltage (generator), something like a buffered divider.

2) Page 19, can't miss it

3) It can and it can't - while various combinations of L and C can give the same cutoff frequency, they'll have different Q's (for a given load impedance)

4) The graphs on pages 12-15 should be what you're looking for. Look to the top of each page to see which circuit configuration they belong to.
 
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1) Just looking at the pinouts, i see there's a VI_CM pin, which is described as "Analog comparator reference node"; also input DC blocking caps are mandatory, regardless of configuration. All this leads me to believe it has an internally-derived bias / reference voltage (generator), something like a buffered divider.
How is the ground derived for the load? It looks like its done by using two 470 uf caps in series connected across the supply and using the center as the ground. That would roll off the lows very early, wont it?

2) Page 19, can't miss it
Thanks

3) It can and it can't - while various combinations of L and C can give the same cutoff frequency, they'll have different Q's (for a given load impedance)

Pls elaborate. If the C is changed and that changes the Q then how does it affect the amp operation?

4) The graphs on pages 12-15 should be what you're looking for. Look to the top of each page to see which circuit configuration they belong to.
I wanted to see the operation near 20hz-40hz. I dont see that anywhere in the datasheet
 
In the BTL / PBTL configurations, the load doesn't need any sort of ground connection 🙂

Bridge-tied load - Wikipedia, the free encyclopedia

www.ti.com/lit/an/sloa119a/sloa119a.pdf - "Class-D LC Filter Design (Rev. A)"

Sorry about that last part - now that i look more carefully, i see the THD graph has the output power on the X-axis. THD (also) depends a lot on the output filter components, the actual board layout, and several other factors. As a ballpark figure though, i guess the evaluation board measurements should do: www.ti.com/lit/ug/slau288a/slau288a.pdf‎ (starting from page 9)
 
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